• Rajneesh Bhardwaj's avatar
    platform/x86: intel_pmc_core: Fix PCH IP sts reading · 7c114e86
    Rajneesh Bhardwaj authored
    [ Upstream commit 0e68eeea ]
    
    A previous commit "platform/x86: intel_pmc_core: Make the driver PCH
    family agnostic <c977b98b>" provided
    better abstraction to this driver but has some fundamental issues.
    
    e.g. the following condition
    
    for (index = 0; index < pmcdev->map->ppfear_buckets &&
    	index < PPFEAR_MAX_NUM_ENTRIES; index++, iter++)
    
    is wrong because for CNL, PPFEAR_MAX_NUM_ENTRIES is hardcoded as 5 which
    is _wrong_ and even though ppfear_buckets is 8, the loop fails to read
    all eight registers needed for CNL PCH i.e. PPFEAR0 and PPFEAR1. This
    patch refactors the pfear show logic to correctly read PCH IP power
    gating status for Cannonlake and beyond.
    
    Cc: "David E. Box" <david.e.box@intel.com>
    Cc: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
    Fixes: c977b98b ("platform/x86: intel_pmc_core: Make the driver PCH family agnostic")
    Signed-off-by: default avatarRajneesh Bhardwaj <rajneesh.bhardwaj@linux.intel.com>
    Signed-off-by: default avatarAndy Shevchenko <andriy.shevchenko@linux.intel.com>
    Signed-off-by: default avatarSasha Levin <sashal@kernel.org>
    7c114e86
intel_pmc_core.c 19.2 KB