Add register sequences for SGMII + QSGMII multilink configuration
for 100MHz refclk.
Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Link: https://lore.kernel.org/r/20240602021629.3027660-1-s-vadapalli@ti.comSigned-off-by: Vinod Koul <vkoul@kernel.org>