• David Daney's avatar
    MIPS: perf: Add support for 64-bit perf counters. · 82091564
    David Daney authored
    The hard coded constants are moved to struct mips_pmu.  All counter
    register access move to the read_counter and write_counter function
    pointers, which are set to either 32-bit or 64-bit access methods at
    initialization time.
    
    Many of the function pointers in struct mips_pmu were not needed as
    there was only a single implementation, these were removed.
    
    I couldn't figure out what made struct cpu_hw_events.msbs[] at all
    useful, so I removed it too.
    
    Some functions and other declarations were reordered to reduce the
    need for forward declarations.
    Signed-off-by: default avatarDavid Daney <david.daney@cavium.com>
    Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
    Cc: Paul Mackerras <paulus@samba.org>
    Cc: Ingo Molnar <mingo@elte.hu>
    Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
    Cc: Deng-Cheng Zhu <dengcheng.zhu@gmail.com>
    To: linux-mips@linux-mips.org
    Patchwork: https://patchwork.linux-mips.org/patch/2792/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
    82091564
perf_event_mipsxx.c 38.3 KB