• Martin Blumenstingl's avatar
    clk: meson: meson8b: add compatibles for Meson8 and Meson8m2 · 855f06a1
    Martin Blumenstingl authored
    The clock controller on Meson8, Meson8b and Meson8m2 is very similar
    based on the code from the Amlogic GPL kernel sources. Add separate
    compatibles for each SoC to make sure that we can easily implement
    all the small differences for each SoC later on.
    
    In general the Meson8 and Meson8m2 seem to be almost identical as they
    even share the same mach-meson8 directory in Amlogic's GPL kernel
    sources.
    The main clocks on Meson8, Meson8b and Meson8m2 are very similar,
    because they are all using the same PLL values, 90% of the clock gates
    are the same (the actual diffstat of the mach-meson8/clock.c and
    mach-meson8b/clock.c files is around 30 to 40 lines, when excluding
    all commented out code).
    The difference between the Meson8 and Meson8b clock gates seem to be:
    - Meson8 has AIU_PCLK, HDMI_RX, VCLK2_ENCT, VCLK2_ENCL, UART3,
      CSI_DIG_CLKIN gates which don't seem to be available on Meson8b
    - the gate on Meson8 for bit 7 seems to be named "_1200XXX" instead
      of "PERIPHS_TOP" (on Meson8b)
    - Meson8b has a SANA gate which doesn't seem to exist on Meson8 (or
      on Meson8 the same bit is used by the UART3 gate in Amlogic's GPL
      kernel sources)
    None of these gates is added for now, since it's unclear whether these
    definitions are actually correct (the VCLK2_ENCT gate for example is
    defined, but only used in some commented block).
    
    The main difference between all three SoCs seem to be the video (VPU)
    clocks. Apart from different supported clock rates (according to vpu.c
    in mach-meson8 and mach-meson8b from Amlogic's GPL kernel sources) the
    most notable difference is that Meson8m2 has a GP_PLL clock and a mux
    (probably the same as on the Meson GX SoCs) to support glitch-free
    (clock rate) switching.
    None of these VPU clocks are not supported by our mainline meson8b
    clock driver yet though.
    Signed-off-by: default avatarMartin Blumenstingl <martin.blumenstingl@googlemail.com>
    Acked-by: default avatarRob Herring <robh@kernel.org>
    Acked-by: default avatarKevin Hilman <khilman@baylibre.com>
    Signed-off-by: default avatarJerome Brunet <jbrunet@baylibre.com>
    855f06a1
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