The OTG capable USB2 PHY has a reset line (which is shared with other
components, such as the USB3 PHY for example) and a clock (which are
both part of different registers). Add the properties
for the reset line and clocks as optional ones since not all PHYs have
them (currently only the OTG capable PHY is known to use these).
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>