• James Clark's avatar
    coresight: Use per-sink trace ID maps for Perf sessions · 5ad628a7
    James Clark authored
    This will allow sessions with more than CORESIGHT_TRACE_IDS_MAX ETMs
    as long as there are fewer than that many ETMs connected to each sink.
    
    Each sink owns its own trace ID map, and any Perf session connecting to
    that sink will allocate from it, even if the sink is currently in use by
    other users. This is similar to the existing behavior where the dynamic
    trace IDs are constant as long as there is any concurrent Perf session
    active. It's not completely optimal because slightly more IDs will be
    used than necessary, but the optimal solution involves tracking the PIDs
    of each session and allocating ID maps based on the session owner. This
    is difficult to do with the combination of per-thread and per-cpu modes
    and some scheduling issues. The complexity of this isn't likely to worth
    it because even with multiple users they'd just see a difference in the
    ordering of ID allocations rather than hitting any limits (unless the
    hardware does have too many ETMs connected to one sink).
    Signed-off-by: default avatarJames Clark <james.clark@arm.com>
    Reviewed-by: default avatarMike Leach <mike.leach@linaro.org>
    Signed-off-by: default avatarJames Clark <james.clark@linaro.org>
    Signed-off-by: default avatarSuzuki K Poulose <suzuki.poulose@arm.com>
    Link: https://lore.kernel.org/r/20240722101202.26915-15-james.clark@linaro.org
    5ad628a7
coresight-stm.c 25.8 KB