Add support for the AMD Opteron/Athlon64/Hammer/K8 line to the 32bit
kernel.

Mostly just reusing Athlon code with some changed CPU model checks.
The Hammer has model number 15.

I also fixed rmb()/mb() to use the SSE2 mfence/lfence instructions
on P4 and Hammer. They are somewhat cheaper than the locked cycle.