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Gary Hade authored
On some systems there could be bits set in the upper half of the control value provided by the _PSS object. These bits are only relevant for cpufreq drivers that use IO ports which are not currently supported by the speedstep-centrino driver. The current MSR oriented code assumes that upper bits are not set and thus fails to work correctly when they are. e.g. the control and status value equality check failed on the IBM x3650 even though the ACPI spec allows inequality. Signed-off-by:
Gary Hade <garyhade@us.ibm.com> Signed-off-by:
Dave Jones <davej@redhat.com>
8b9c6671