• Hans de Goede's avatar
    ASoC: rt5640: Remove is_sys_clk_from_pll, it has ordering issues · 8e7a1f1f
    Hans de Goede authored
    is_sys_clk_from_pll() is used as a snd_soc_dapm_route.connected callback,
    checking RT5640_GBL_CLK to determine if the sys-clk is PLL1 and thus the
    PWR_PLL bit in reg PWR_ANLG2 must be set.
    
    RT5640_GBL_CLK is changed by rt5640_set_dai_sysclk(), which gets called by
    the pre_pmu / post_pmd functions of the "Platform Clock" dapm-supply.
    
    This creates an ordering issue, during a dapm transition first all
    connected() callbacks are called to build a list of supplies to enable
    and then the complete list is walked to enable the supplies. Since the
    connected() check happens before enabling any supplies,
    is_sys_clk_from_pll() ends up deciding if the PWR_PLL bit should be set
    based on the state the "Platform Clock" supply had *before* the transition.
    This sometimes results in PWR_PLL being off, even though *after* the
    transition PLL1 is configured as sys-clk.
    
    This commit removes is_sys_clk_from_pll() instead simply setting / clearing
    PWR_PLL in rt5640_set_dai_sysclk() based on the selected sys-clk, which
    fixes this and as a bonus results in a nice cleanup.
    Signed-off-by: default avatarHans de Goede <hdegoede@redhat.com>
    Signed-off-by: default avatarMark Brown <broonie@kernel.org>
    8e7a1f1f
rt5640.c 73.8 KB