• Ville Syrjälä's avatar
    drm/i915: Align DSPSURF to 128k on VLV/CHV · 985b8bb4
    Ville Syrjälä authored
    VLV/CHV have problems with 4k aligned linear scanout buffers. The VLV
    docs got updated at some point to say that we need to align them to
    128k, just like we do on gen4.
    
    So far I've seen the problem manifest when the stride is an odd multiple
    of 512 bytes, and the surface address meets the following pattern
    '(addr & 0xf000) == 0x1000' (also == 0x2000 is problematic on VLV). The
    result is a starcase effect (so some pages get dropped maybe?), with a
    few pages here and there clearly getting scannout out at the wrong position.
    
    I've not actually been able to reproduce this problem on gen4, so it's
    not clear of the issue is any way related to the 128k restrictions
    supposedly inherited from gen4. But let's hope the 128k alignment is
    sufficient to hide it all.
    Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
    Reviewed-by: default avatarClint Taylor <Clinton.A.Taylor@intel.com>
    Reviewed-by: default avatarArun R Murthy <arun.r.murthy@intel.com>
    Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
    985b8bb4
intel_display.c 437 KB