• Maciej W. Rozycki's avatar
    MIPS: Respect the ISA level in FCSR handling · 9b26616c
    Maciej W. Rozycki authored
    Define the central place the default FCSR value is set from, initialised
    in `cpu_probe'.  Determine the FCSR mask applied to values written to
    the register with CTC1 in the full emulation mode and via ptrace(2),
    according to the ISA level of processor hardware or the writability of
    bits 31:18 if actual FPU hardware is used.
    
    Software may rely on FCSR bits whose functions our emulator does not
    implement, so it should not allow them to be set or software may get
    confused.  For ptrace(2) it's just sanity.
    
    [ralf@linux-mips.org: Fixed double inclusion of <asm/current.h>.]
    Signed-off-by: default avatarMaciej W. Rozycki <macro@linux-mips.org>
    Cc: linux-mips@linux-mips.org
    Patchwork: https://patchwork.linux-mips.org/patch/9711/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
    9b26616c
cpu-info.h 3.87 KB