drivers/clk/samsung/clk-exynos7.c · 9cc2a0c95ff3f815deeba1ccd0d11b1d3bc46551 · Kirill Smelkov / linux

clk: samsung: exynos7: add gate clock for DMA block · 9cc2a0c9

Padmavathi Venna authored Jan 13, 2015

Add support for PDMA0 and PDMA1 gate clks.
Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>

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