To prevent incorrect setting of the EPLL the clock frequency
values are changed to exact values as possible to obtain on
the EPLL output with given PLL coefficients.
This patch is required after recent change of the EPLL rate
table by patch
"clk: samsung: exynos5420: The EPLL rate table corrections".
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Mark Brown <broonie@kernel.org>