• Daniel Vetter's avatar
    drm/i915: simplify rps interrupt enabling/disabling sequence · a0b3335a
    Daniel Vetter authored
    At the moment we have the following interrupt enabling sequence:
    1. irq preinstall hook
    2. enabling the interrupt handler and calling irq postinstall hook
    3. enable rps interrupts from the async work
    
    And the folliwing disable sequence:
    1. disabling the interrupt handler and calling the uninstall hook
    2. disabling the rps interrupt
    
    Since the postinstall hook now always sets up PMIIR, PMIER and PMIMR
    to known-good states there no way for an interrupt to sneak in in the
    enable sequence, so we can reinstate the WARN lost in
    
    commit eda63ffb
    Author: Ben Widawsky <ben@bwidawsk.net>
    Date:   Tue May 28 19:22:26 2013 -0700
    
        drm/i915: Add PM regs to pre/post install
    
    Note that there's some room for future cleanups since most of the
    interrupt register clearing in the disable function is rather
    redundant. But that's better done in follow-up patches, if at all.
    
    Cc: Ben Widawsky <ben@bwidawsk.net>
    Reviewed-by: default avatarBen Widawsky <ben@bwidawsk.net>
    Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
    a0b3335a
intel_pm.c 155 KB