• Helge Deller's avatar
    parisc: Fix TLB related boot crash on SMP machines · a0bd6aa0
    Helge Deller authored
    commit 24d0492b upstream.
    
    At bootup we run measurements to calculate the best threshold for when we
    should be using full TLB flushes instead of just flushing a specific amount of
    TLB entries.  This performance test is run over the kernel text segment.
    
    But running this TLB performance test on the kernel text segment turned out to
    crash some SMP machines when the kernel text pages were mapped as huge pages.
    
    To avoid those crashes this patch simply skips this test on some SMP machines
    and calculates an optimal threshold based on the maximum number of available
    TLB entries and number of online CPUs.
    
    On a technical side, this seems to happen:
    The TLB measurement code uses flush_tlb_kernel_range() to flush specific TLB
    entries with a page size of 4k (pdtlb 0(sr1,addr)). On UP systems this purge
    instruction seems to work without problems even if the pages were mapped as
    huge pages.  But on SMP systems the TLB purge instruction is broadcasted to
    other CPUs. Those CPUs then crash the machine because the page size is not as
    expected.  C8000 machines with PA8800/PA8900 CPUs were not affected by this
    problem, because the required cache coherency prohibits to use huge pages at
    all.  Sadly I didn't found any documentation about this behaviour, so this
    finding is purely based on testing with phyiscal SMP machines (A500-44 and
    J5000, both were 2-way boxes).
    Signed-off-by: default avatarHelge Deller <deller@gmx.de>
    Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
    a0bd6aa0
cache.c 16.2 KB