• Robert Richter's avatar
    cxl/pci: Fix disabling memory if DVSEC CXL Range does not match a CFMWS window · 0cab6872
    Robert Richter authored
    The Linux CXL subsystem is built on the assumption that HPA == SPA.
    That is, the host physical address (HPA) the HDM decoder registers are
    programmed with are system physical addresses (SPA).
    
    During HDM decoder setup, the DVSEC CXL range registers (cxl-3.1,
    8.1.3.8) are checked if the memory is enabled and the CXL range is in
    a HPA window that is described in a CFMWS structure of the CXL host
    bridge (cxl-3.1, 9.18.1.3).
    
    Now, if the HPA is not an SPA, the CXL range does not match a CFMWS
    window and the CXL memory range will be disabled then. The HDM decoder
    stops working which causes system memory being disabled and further a
    system hang during HDM decoder initialization, typically when a CXL
    enabled kernel boots.
    
    Prevent a system hang and do not disable the HDM decoder if the
    decoder's CXL range is not found in a CFMWS window.
    
    Note the change only fixes a hardware hang, but does not implement
    HPA/SPA translation. Support for this can be added in a follow on
    patch series.
    Signed-off-by: default avatarRobert Richter <rrichter@amd.com>
    Fixes: 34e37b4c ("cxl/port: Enable HDM Capability after validating DVSEC Ranges")
    Cc: <stable@vger.kernel.org>
    Link: https://lore.kernel.org/r/20240216160113.407141-1-rrichter@amd.comSigned-off-by: default avatarDan Williams <dan.j.williams@intel.com>
    0cab6872
pci.c 25 KB