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  • Kirill Smelkov
  • linux
  • Repository
  • linux
  • arch
  • x86
  • kernel
  • cpu
  • microcode
  • core.c
Find file BlameHistoryPermalink
  • Ashok Raj's avatar
    x86/microcode/intel: Rip out mixed stepping support for Intel CPUs · ae76d951
    Ashok Raj authored Oct 17, 2023
    
    
    Mixed steppings aren't supported on Intel CPUs. Only one microcode patch
    is required for the entire system. The caching of microcode blobs which
    match the family and model is therefore pointless and in fact is
    dysfunctional as CPU hotplug updates use only a single microcode blob,
    i.e. the one where *intel_ucode_patch points to.
    
    Remove the microcode cache and make it an AMD local feature.
    
      [ tglx:
         - save only at the end. Otherwise random microcode ends up in the
      	  pointer for early loading
         - free the ucode patch pointer in save_microcode_patch() only
        after kmemdup() has succeeded, as reported by Andrew Cooper ]
    
    Originally-by: default avatarThomas Gleixner <tglx@linutronix.de>
    Signed-off-by: default avatarAshok Raj <ashok.raj@intel.com>
    Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
    Signed-off-by: default avatarBorislav Petkov (AMD) <bp@alien8.de>
    Link: https://lore.kernel.org/r/20231017211722.404362809@linutronix.de
    ae76d951
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