• Joseph Lo's avatar
    ARM: tegra: add LP1 suspend support for Tegra20 · 731a9274
    Joseph Lo authored
    The LP1 suspend mode will power off the CPU, clock gated the PLLs and put
    SDRAM to self-refresh mode. Any interrupt can wake up device from LP1. The
    sequence when LP1 suspending:
    
    * tunning off L1 data cache and the MMU
    * putting SDRAM into self-refresh
    * storing some EMC registers and SCLK burst policy
    * switching CPU to CLK_M (12MHz OSC)
    * switching SCLK to CLK_S (32KHz OSC)
    * tunning off PLLM, PLLP and PLLC
    * shutting off the CPU rail
    
    The sequence of LP1 resuming:
    
    * re-enabling PLLM, PLLP, and PLLC
    * restoring some EMC registers and SCLK burst policy
    * setting up CCLK burst policy to PLLP
    * resuming SDRAM to normal mode
    * jumping to the "tegra_resume" from PMC_SCRATCH41
    
    Due to the SDRAM will be put into self-refresh mode, the low level
    procedures of LP1 suspending and resuming should be copied to
    TEGRA_IRAM_CODE_AREA (TEGRA_IRAM_BASE + SZ_4K) when suspending. Before
    restoring the CPU context when resuming, the SDRAM needs to be switched
    back to normal mode. And the PLLs need to be re-enabled, SCLK burst policy
    be restored, CCLK burst policy be set in PLLP. Then jumping to
    "tegra_resume" that was expected to be stored in PMC_SCRATCH41 to restore
    CPU context and back to kernel.
    
    Based on the work by:
    Colin Cross <ccross@android.com>
    Gary King <gking@nvidia.com>
    Signed-off-by: default avatarJoseph Lo <josephl@nvidia.com>
    Signed-off-by: default avatarStephen Warren <swarren@nvidia.com>
    731a9274
pm.h 1.73 KB