• William Zhang's avatar
    spi: bcm63xx-hsspi: Add prepend mode support · b7a82103
    William Zhang authored
    Due to the controller limitation to keep the chip select low during the
    bus idle time between the transfer, a dummy cs workaround was used when
    this driver was first upstreamed to the kernel.  It basically picks the
    dummy cs as !actual_cs so typically dummy cs is 1 when most of the case
    only cs 0 is used in the board design. Then invert the polarity of both
    cs and tell the controller to start the transfers using dummy cs.
    Assuming both cs are active low before the inversion, effectively this
    keeps dummy cs high and actual cs low during the transfer and workaround
    the issue.
    
    This workaround implies that dummy cs 1 pin has to be set to chip
    selection function in the pinmux when the transfer clock is above
    25MHz. The old chips likely have default pinmux set to chip select on
    the dummy cs pin so it works but this is not case for the new Broadband
    BCA chips and this workaround stop working. This is specifically an
    issue to support SPI NAND and SPI NOR flash because these flash devices
    can typically run at or above 100MHz.
    
    This patch utilizes the prepend feature of the controller to combine the
    multiple transfers in the same message to a single transfer when
    possible. This way there is no need to keep clock low between transfers
    and solve the issue without any hardware requirement.
    
    Multiple transfers within a SPI message may be combined into one
    transfer if the following are all true:
      * One or more half duplex write transfer in single bit mode
      * Optional full duplex read/write at the end
      * No delay and cs_change between transfers
    
    Most of the SPI device meets this requirements such as SPI NOR,
    SPI NAND flash, Broadcom SPI voice card and etc. For any SPI message
    that does not meet the above requirement to combine the transfers, we
    switch to original dummy cs mode but limit the clock rate to the safe
    25MHz. This is the default auto transfer mode and it makes sure all the
    SPI message can be supported automatically under the hood.
    
    This patch also adds the driver sysfs node xfer_mode to provide
    the option for overriding the default auto mode and force it to dummy cs
    or prepend mode.
    Signed-off-by: default avatarWilliam Zhang <william.zhang@broadcom.com>
    Link: https://lore.kernel.org/r/20230209200246.141520-12-william.zhang@broadcom.comSigned-off-by: default avatarMark Brown <broonie@kernel.org>
    b7a82103
spi-bcm63xx-hsspi.c 25 KB