• Robin Murphy's avatar
    drm/arm/hdlcd: Allow a bit of clock tolerance · 1c810739
    Robin Murphy authored
    On the Arm Juno platform, the HDLCD pixel clock is constrained to 250KHz
    resolution in order to avoid the tiny System Control Processor spending
    aeons trying to calculate exact PLL coefficients. This means that modes
    like my oddball 1600x1200 with 130.89MHz clock get rejected since the
    rate cannot be matched exactly. In practice, though, this mode works
    quite happily with the clock at 131MHz, so let's relax the check to
    allow a little bit of slop.
    Signed-off-by: default avatarRobin Murphy <robin.murphy@arm.com>
    Signed-off-by: default avatarLiviu Dudau <liviu.dudau@arm.com>
    1c810739
hdlcd_crtc.c 10 KB