• Palmer Dabbelt's avatar
    RISC-V CPU Idle Support · bee7fbc3
    Palmer Dabbelt authored
    This series adds RISC-V CPU Idle support using SBI HSM suspend function.
    The RISC-V SBI CPU idle driver added by this series is highly inspired
    from the ARM PSCI CPU idle driver.
    
    Special thanks Sandeep Tripathy for providing early feeback on SBI HSM
    support in all above projects (RISC-V SBI specification, OpenSBI, and
    Linux RISC-V).
    
    * palmer/riscv-idle:
      RISC-V: Enable RISC-V SBI CPU Idle driver for QEMU virt machine
      dt-bindings: Add common bindings for ARM and RISC-V idle states
      cpuidle: Add RISC-V SBI CPU idle driver
      cpuidle: Factor-out power domain related code from PSCI domain driver
      RISC-V: Add SBI HSM suspend related defines
      RISC-V: Add arch functions for non-retentive suspend entry/exit
      RISC-V: Rename relocate() and make it global
      RISC-V: Enable CPU_IDLE drivers
    bee7fbc3
rv32_defconfig 2.87 KB