• Alexander Graf's avatar
    KVM: PPC: Call SLB patching code in interrupt safe manner · 021ec9c6
    Alexander Graf authored
    Currently we're racy when doing the transition from IR=1 to IR=0, from
    the module memory entry code to the real mode SLB switching code.
    
    To work around that I took a look at the RTAS entry code which is faced
    with a similar problem and did the same thing:
    
      A small helper in linear mapped memory that does mtmsr with IR=0 and
      then RFIs info the actual handler.
    
    Thanks to that trick we can safely take page faults in the entry code
    and only need to be really wary of what to do as of the SLB switching
    part.
    Signed-off-by: default avatarAlexander Graf <agraf@suse.de>
    Signed-off-by: default avatarAvi Kivity <avi@redhat.com>
    021ec9c6
book3s_64_slb.S 7.02 KB