• Xiaojian Du's avatar
    drm/amd/pm: add the fine grain tuning function for vangogh · c98ee897
    Xiaojian Du authored
    This patch is to add the fine grain tuning function for vangogh.
    This function uses the pp_od_clk_voltage sysfs file to configure the min
    and max value of gfx clock frequency or restore the default value.
    
    Command guide:
    echo "s level value" > pp_od_clk_voltage
            "s" - set the sclk frequency
            "level" - 0 or 1, "0" represents the min value,  "1" represents
            the max value
            "value" - the target value of sclk frequency, it should be
            limited in the safe range
    echo "r" > pp_od_clk_voltage
    	"r" - reset the sclk frequency, restore the default value
            instantly
    echo "c" > pp_od_clk_voltage
            "c" - commit the min and max value of sclk frequency to the system
            only after the commit command, the setting target values by "s" command
            will take effect.
    Example:
    1)check the default sclk frequency
    	$ cat pp_od_clk_voltage
    	OD_SCLK:
    	0:        200Mhz
    	1:       1400Mhz
    	OD_RANGE:
    	SCLK:     200MHz       1400MHz
    2)use "s" -- set command to configure the min or max sclk frequency
    	$ echo "s 0 600" > pp_od_clk_voltage
    	$ echo "s 1 1000" > pp_od_clk_voltage
    	$ echo "c" > pp_od_clk_voltage
            $ cat pp_od_clk_voltage
    	OD_SCLK:
    	0:        600Mhz
    	1:       1000Mhz
    	OD_RANGE:
    	SCLK:     200MHz       1400MHz
    3)use "r" -- reset command to restore the min and max sclk frequency
    	$ echo "r" > pp_od_clk_voltage
            $ cat pp_od_clk_voltage
    	OD_SCLK:
    	0:        200Mhz
    	1:       1400Mhz
    	OD_RANGE:
    	SCLK:     200MHz       1400MHz
    Signed-off-by: default avatarXiaojian Du <Xiaojian.Du@amd.com>
    Reviewed-by: default avatarEvan Quan <evan.quan@amd.com>
    Reviewed-by: default avatarHuang Rui <ray.huang@amd.com>
    Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
    c98ee897
smu_internal.h 6.93 KB