• Cédric Le Goater's avatar
    mtd: spi-nor: add memory controllers for the Aspeed AST2500 SoC · ceb720c7
    Cédric Le Goater authored
    This driver adds mtd support for the Aspeed AST2500 SoC static memory
    controllers :
    
     * Firmware SPI Memory Controller (FMC)
       . BMC firmware
       . 3 chip select pins (CE0 ~ CE2)
       . supports SPI type flash memory (CE0-CE1)
       . CE2 can be of NOR type flash but this is not supported by the
         driver
    
     * SPI Flash Controller (SPI1 and SPI2)
       . host firmware
       . 2 chip select pins (CE0 ~ CE1)
       . supports SPI type flash memory
    
    Each controller has a memory range on which it maps its flash module
    slaves. Each slave is assigned a memory window for its mapping that
    can be changed at bootime with the Segment Address Register.
    
    Each SPI flash slave can then be accessed in two modes: Command and
    User. When in User mode, accesses to the memory segment of the slaves
    are translated in SPI transfers. When in Command mode, the HW
    generates the SPI commands automatically and the memory segment is
    accessed as if doing a MMIO.
    
    Currently, only the User mode is supported. Command mode needs a
    little more work to check that the memory window on the AHB bus fits
    the module size.
    
    Based on previous work from Milton D. Miller II <miltonm@us.ibm.com>
    Signed-off-by: default avatarCédric Le Goater <clg@kaod.org>
    Reviewed-by: default avatarJoel Stanley <joel@jms.id.au>
    Reviewed-by: default avatarMarek Vasut <marek.vasut@gmail.com>
    Signed-off-by: default avatarCyrille Pitchen <cyrille.pitchen@atmel.com>
    ceb720c7
aspeed-smc.c 19.8 KB