• Vineet Gupta's avatar
    ARCv2: ioremap: Support dynamic peripheral address space · deaf7565
    Vineet Gupta authored
    The peripheral address space is architectural address window which is
    uncached and typically used to wire up peripherals.
    
    For ARC700 cores (ARCompact ISA based) this was fixed to 1GB region
    0xC000_0000 - 0xFFFF_FFFF.
    
    For ARCv2 based HS38 cores the start address is flexible and can be
    0xC, 0xD, 0xE, 0xF 000_000 by programming AUX_NON_VOLATILE_LIMIT reg
    (typically done in bootloader)
    
    Further in cas of PAE, the physical address can extend beyond 4GB so
    need to confine this check, otherwise all pages beyond 4GB will be
    treated as uncached
    Signed-off-by: default avatarVineet Gupta <vgupta@synopsys.com>
    deaf7565
cache.c 27.8 KB