• Manjunathappa, Prakash's avatar
    video: da8xx-fb: configure FIFO threshold to reduce underflow errors · fb8fa943
    Manjunathappa, Prakash authored
    Patch works around the below silicon errata:
    During LCDC initialization, there is the potential for a FIFO
    underflow condition to occur. A FIFO underflow condition
    occurs when the input FIFO is completely empty and the LCDC
    raster controller logic that drives data to the output pins
    attempts to fetch data from the FIFO. When a FIFO underflow
    condition occurs, incorrect data will be driven out on the
    LCDC data pins.
    
    Software should poll the FUF bit field in the LCD_STAT register
    to check if an error condition has occurred or service the
    interrupt if FUF_EN is enabled when FUF occurs. If the FUF bit
    field has been set to 1, this will indicate an underflow
    condition has occurred and then the software should execute a
    reset of the LCDC via the LPSC.
    
    This problem may occur if the LCDC FIFO threshold size
    (LCDDMA_CTRL[TH_FIFO_READY]) is left at its default value after
    reset. Increasing the FIFO threshold size will reduce or
    eliminate underflows. Setting the threshold size to 256 double
    words or larger is recommended.
    
    Above issue is described in section 2.1.3 of silicon errata
    http://www.ti.com/lit/er/sprz313e/sprz313e.pdfSigned-off-by: default avatarRajashekhara, Sudhakar <sudhakar.raj@ti.com>
    Signed-off-by: default avatarManjunathappa, Prakash <prakash.pm@ti.com>
    Signed-off-by: default avatarFlorian Tobias Schandinat <FlorianSchandinat@gmx.de>
    fb8fa943
da8xx-fb.h 2.21 KB