• Stanislav Lisovskiy's avatar
    drm/i915: Add DSC support to MST path · d51f25eb
    Stanislav Lisovskiy authored
    Whenever we are not able to get enough timeslots
    for required PBN, let's try to allocate those
    using DSC, just same way as we do for SST.
    
    v2: Removed intel_dp_mst_dsc_compute_config and refactored
        intel_dp_dsc_compute_config to support timeslots as a
        parameter(Ville Syrjälä)
    
    v3: - Rebased
        - Added a debug to see that we at least try reserving
          VCPI slots using DSC, because currently its not visible
          from the logs, thus making debugging more tricky.
        - Moved timeslots to numerator, where it should be.
    
    v4: - Call drm_dp_mst_atomic_check already during link
          config computation, because we need to know already
          by this moment if uncompressed amount of VCPI slots
          needed can fit, otherwise we need to use DSC.
          (thanks to Vinod Govindapillai for pointing this out)
    
    v5: - Put pipe_config->bigjoiner_pipes back to original
          condition in intel_dp_dsc_compute_config
          (don't remember when I lost it)
    
    v6: - Removed unnecessary drm_dp_mst_atomic_check as it is
          now always called in a newly introduced
          intel_dp_mst_find_vcpi_slots_for_bpp function
          (Vinod Govindapillai)
    Reviewed-by: default avatarVinod Govindapillai <vinod.govindapillai@intel.com>
    Signed-off-by: default avatarStanislav Lisovskiy <stanislav.lisovskiy@intel.com>
    Link: https://patchwork.freedesktop.org/patch/msgid/20221101094222.22091-5-stanislav.lisovskiy@intel.com
    d51f25eb
intel_dp.h 5.75 KB