• Marc Zyngier's avatar
    irqchip/gic-v3: Reset APgRn registers at boot time · d6062a6d
    Marc Zyngier authored
    Booting a crash kernel while in an interrupt handler is likely
    to leave the Active Priority Registers with some state that
    is not relevant to the new kernel, and is likely to lead
    to erratic behaviours such as interrupts not firing as their
    priority is already active.
    
    As a sanity measure, wipe the APRs clean on startup. We make
    sure to wipe both group 0 and 1 registers in order to avoid
    any surprise.
    Signed-off-by: default avatarMarc Zyngier <marc.zyngier@arm.com>
    d6062a6d
arch_gicv3.h 9.76 KB