• Daniel Vetter's avatar
    drm/i915: dynamic Haswell display power well support · d6dd9eb1
    Daniel Vetter authored
    We can disable (almost) all the display hw if we only use pipe A, with
    the integrated edp transcoder on port A. Because we don't set the cpu
    transcoder that early (yet), we need to help us with a trick to simply
    check for any edp encoders.
    
    v2: Paulo Zanoni pointed out that we also need to configure the eDP
    cpu transcoder correctly.
    
    v3: Made by Paulo Zanoni
      - Rebase patch to be on top of "fix intel_init_power_wells" patch
      - Fix typos
      - Fix a small bug by adding a "connectors_active" check
      - Restore the initial code that unconditionally enables the power
        well when taking over from the BIOS
    
    v4: Made by Paulo Zanoni
      - One more typo spotted by Jani Nikula
    
    v5: Made by Paulo Zanoni
      - Rebase
    Signed-off-by: default avatarPaulo Zanoni <paulo.r.zanoni@intel.com>
    Reviewed-by: default avatarJani Nikula <jani.nikula@intel.com>
    Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
    d6dd9eb1
intel_ddi.c 40.8 KB