• Xie XiuQi's avatar
    x86/mce: Reenable CMCI banks when swiching back to interrupt mode · e4b09a61
    Xie XiuQi authored
    commit 1b484655 upstream.
    
    Zhang Liguang reported the following issue:
    
    1) System detects a CMCI storm on the current CPU.
    
    2) Kernel disables the CMCI interrupt on banks owned by the
       current CPU and switches to poll mode
    
    3) After the CMCI storm subsides, kernel switches back to
       interrupt mode
    
    4) We expect the system to reenable the CMCI interrupt on banks
       owned by the current CPU
    
       mce_intel_adjust_timer
       |-> cmci_reenable
           |-> cmci_discover     # owned banks are ignored here
    
      static void cmci_discover(int banks)
    	...
    	for (i = 0; i < banks; i++) {
    		...
    		if (test_bit(i, owned))	# ownd banks is ignore here
    			continue;
    
    So convert cmci_storm_disable_banks() to
    cmci_toggle_interrupt_mode() which controls whether to enable or
    disable CMCI interrupts with its argument.
    
    NB: We cannot clear the owned bit because the banks won't be
    polled, otherwise. See:
    
      27f6c573 ("x86, CMCI: Add proper detection of end of CMCI storms")
    
    for more info.
    Reported-by: default avatarZhang Liguang <zhangliguang@huawei.com>
    Signed-off-by: default avatarXie XiuQi <xiexiuqi@huawei.com>
    Signed-off-by: default avatarBorislav Petkov <bp@suse.de>
    Cc: H. Peter Anvin <hpa@zytor.com>
    Cc: Linus Torvalds <torvalds@linux-foundation.org>
    Cc: Peter Zijlstra <peterz@infradead.org>
    Cc: Thomas Gleixner <tglx@linutronix.de>
    Cc: Tony Luck <tony.luck@intel.com>
    Cc: huawei.libin@huawei.com
    Cc: linux-edac <linux-edac@vger.kernel.org>
    Cc: rui.xiang@huawei.com
    Link: http://lkml.kernel.org/r/1439396985-12812-10-git-send-email-bp@alien8.deSigned-off-by: default avatarIngo Molnar <mingo@kernel.org>
    Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
    e4b09a61
mce_intel.c 10.5 KB