• Dapeng Mi's avatar
    perf/x86/intel: Correct incorrect 'or' operation for PMU capabilities · e8df9d9f
    Dapeng Mi authored
    When running perf-stat command on Intel hybrid platform, perf-stat
    reports the following errors:
    
      sudo taskset -c 7 ./perf stat -vvvv -e cpu_atom/instructions/ sleep 1
    
      Opening: cpu/cycles/:HG
      ------------------------------------------------------------
      perf_event_attr:
        type                             0 (PERF_TYPE_HARDWARE)
        config                           0xa00000000
        disabled                         1
      ------------------------------------------------------------
      sys_perf_event_open: pid 0  cpu -1  group_fd -1  flags 0x8
      sys_perf_event_open failed, error -16
    
       Performance counter stats for 'sleep 1':
    
           <not counted>      cpu_atom/instructions/
    
    It looks the cpu_atom/instructions/ event can't be enabled on atom PMU
    even when the process is pinned on atom core. Investigation shows that
    exclusive_event_init() helper always returns -EBUSY error in the perf
    event creation. That's strange since the atom PMU should not be an
    exclusive PMU.
    
    Further investigation shows the issue was introduced by commit:
    
      97588df8 ("perf/x86/intel: Add common intel_pmu_init_hybrid()")
    
    The commit originally intents to clear the bit PERF_PMU_CAP_AUX_OUTPUT
    from PMU capabilities if intel_cap.pebs_output_pt_available is not set,
    but it incorrectly uses 'or' operation and leads to all PMU capabilities
    bits are set to 1 except bit PERF_PMU_CAP_AUX_OUTPUT.
    
    Testing this fix on Intel hybrid platforms, the observed issues
    disappear.
    
    Fixes: 97588df8 ("perf/x86/intel: Add common intel_pmu_init_hybrid()")
    Signed-off-by: default avatarDapeng Mi <dapeng1.mi@linux.intel.com>
    Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
    Cc: stable@vger.kernel.org
    Link: https://lore.kernel.org/r/20231121014628.729989-1-dapeng1.mi@linux.intel.com
    e8df9d9f
core.c 198 KB