• Christian König's avatar
    drm/radeon: add large PTE support for NI, SI and CIK v5 · ec3dbbcb
    Christian König authored
    This patch implements support for VRAM page table entry compression.
    PTE construction is enhanced to identify physically contiguous page
    ranges and mark them in the PTE fragment field. L1/L2 TLB support is
    enabled for 64KB (SI/CIK) and 256KB (NI) PTE fragments, significantly
    improving TLB utilization for VRAM allocations.
    
    Linear store bandwidth is improved from 60GB/s to 125GB/s on Pitcairn.
    Unigine Heaven 3.0 sees an average improvement from 24.7 to 27.7 FPS
    on default settings at 1920x1200 resolution with vsync disabled.
    
    See main comment in radeon_vm.c for a technical description.
    
    v2 (chk): rebased and simplified.
    v3 (chk): add missing hw setup
    v4 (chk): rebased on current drm-fixes-3.15
    v5 (chk): fix comments and commit text
    Signed-off-by: default avatarJay Cornwall <jay@jcornwall.me>
    Signed-off-by: default avatarChristian König <christian.koenig@amd.com>
    Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
    ec3dbbcb
ni.c 66.2 KB