• Jim Quinlan's avatar
    MIPS: Make irqflags.h functions preempt-safe for non-mipsr2 cpus · e97c5b60
    Jim Quinlan authored
    For non MIPSr2 processors, such as the BMIPS 5000, calls to
    arch_local_irq_disable() and others may be preempted, and in doing
    so a stale value may be restored to c0_status.  This fix disables
    preemption for such processors prior to the call and enables it
    after the call.
    
    Those functions that needed this fix have been "outlined" to
    mips-atomic.c, as they are no longer good candidates for inlining.
    
    This bug was observed in a BMIPS 5000, occuring once every few hours
    in a continuous reboot test.  It was traced to the write_lock_irq()
    function which was being invoked in release_task() in exit.c.
    By placing a number of "nops" inbetween the mfc0/mtc0 pair in
    arch_local_irq_disable(), which is called by write_lock_irq(), we
    were able to greatly increase the occurance of this bug.  Similarly,
    the application of this commit silenced the bug.
    Signed-off-by: default avatarJim Quinlan <jim2101024@gmail.com>
    Cc: linux-mips@linux-mips.org
    Cc: David Daney <ddaney.cavm@gmail.com>
    Cc: Kevin Cernekee cernekee@gmail.com
    Cc: Jim Quinlan <jim2101024@gmail.com>
    Patchwork: https://patchwork.linux-mips.org/patch/4321/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
    e97c5b60
irqflags.h 5.11 KB