• Aric Cyr's avatar
    drm/amd/display: 3.2.285 · f4595743
    Aric Cyr authored
    This version brings along following fixes:
    - Read default boot options
    - Find max flickerless instant vtotal delta
    - Refactor dcn401_update_clocks
    - Reduce I2C speed to 95kHz in DCN401
    - Allow higher DSC slice support for small timings on dcn401
    - Don't offload flip if not only address update
    - Check UHBR13.5 cap when determining max link cap
    - Enable SYMCLK gating in DCCG
    - Expand to higher link rates
    - Add left edge pixel for YCbCr422/420 + ODM pipe split
    - Add resource interfaces for get ODM slice rect
    - Add COEF filter types for DCN401
    - Refactor DCN401 DCCG into component directory
    - Fix 3dlut size for Fastloading on DCN401
    - Fix write to non-existent reg on DCN401
    - Remove USBC check for DCN32
    - Remove unused code for some dc files
    - Disable AC/DC codepath when unnecessary
    - Create dcn401_clk_mgr struct
    Acked-by: default avatarAlex Hung <alex.hung@amd.com>
    Signed-off-by: default avatarAric Cyr <aric.cyr@amd.com>
    Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
    Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
    f4595743
dc.h 76.8 KB