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Commit 046d3546 authored by Linus Walleij's avatar Linus Walleij
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Merge tag 'renesas-pinctrl-for-v6.6-tag1' of... 

Merge tag 'renesas-pinctrl-for-v6.6-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel

pinctrl: renesas: Updates for v6.6

  - Use the new devm_clk_get_enabled() helper.
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parents 6ec89cd4 95eb1986
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Showing with 50 additions and 70 deletions
drivers/pinctrl/renesas/pinctrl-rzg2l.c
View file @ 046d3546
......@@ -145,7 +145,6 @@ struct rzg2l_pinctrl {
const struct rzg2l_pinctrl_data *data;
void __iomem *base;
struct device *dev;
struct clk *clk;
struct gpio_chip gpio_chip;
struct pinctrl_gpio_range gpio_range;
......@@ -250,6 +249,7 @@ static int rzg2l_map_add_config(struct pinctrl_map *map,
static int rzg2l_dt_subnode_to_map(struct pinctrl_dev *pctldev,
struct device_node *np,
struct device_node *parent,
struct pinctrl_map **map,
unsigned int *num_maps,
unsigned int *index)
......@@ -267,6 +267,7 @@ static int rzg2l_dt_subnode_to_map(struct pinctrl_dev *pctldev,
struct property *prop;
int ret, gsel, fsel;
const char **pin_fn;
const char *name;
const char *pin;
pinmux = of_find_property(np, "pinmux", NULL);
......@@ -350,8 +351,19 @@ static int rzg2l_dt_subnode_to_map(struct pinctrl_dev *pctldev,
psel_val[i] = MUX_FUNC(value);
}
if (parent) {
name = devm_kasprintf(pctrl->dev, GFP_KERNEL, "%pOFn.%pOFn",
parent, np);
if (!name) {
ret = -ENOMEM;
goto done;
}
} else {
name = np->name;
}
/* Register a single pin group listing all the pins we read from DT */
gsel = pinctrl_generic_add_group(pctldev, np->name, pins, num_pinmux, NULL);
gsel = pinctrl_generic_add_group(pctldev, name, pins, num_pinmux, NULL);
if (gsel < 0) {
ret = gsel;
goto done;
......@@ -361,17 +373,16 @@ static int rzg2l_dt_subnode_to_map(struct pinctrl_dev *pctldev,
* Register a single group function where the 'data' is an array PSEL
* register values read from DT.
*/
pin_fn[0] = np->name;
fsel = pinmux_generic_add_function(pctldev, np->name, pin_fn, 1,
psel_val);
pin_fn[0] = name;
fsel = pinmux_generic_add_function(pctldev, name, pin_fn, 1, psel_val);
if (fsel < 0) {
ret = fsel;
goto remove_group;
}
maps[idx].type = PIN_MAP_TYPE_MUX_GROUP;
maps[idx].data.mux.group = np->name;
maps[idx].data.mux.function = np->name;
maps[idx].data.mux.group = name;
maps[idx].data.mux.function = name;
idx++;
dev_dbg(pctrl->dev, "Parsed %pOF with %d pins\n", np, num_pinmux);
......@@ -418,7 +429,7 @@ static int rzg2l_dt_node_to_map(struct pinctrl_dev *pctldev,
index = 0;
for_each_child_of_node(np, child) {
ret = rzg2l_dt_subnode_to_map(pctldev, child, map,
ret = rzg2l_dt_subnode_to_map(pctldev, child, np, map,
num_maps, &index);
if (ret < 0) {
of_node_put(child);
......@@ -427,7 +438,7 @@ static int rzg2l_dt_node_to_map(struct pinctrl_dev *pctldev,
}
if (*num_maps == 0) {
ret = rzg2l_dt_subnode_to_map(pctldev, np, map,
ret = rzg2l_dt_subnode_to_map(pctldev, np, NULL, map,
num_maps, &index);
if (ret < 0)
goto done;
......@@ -1459,14 +1470,10 @@ static int rzg2l_pinctrl_register(struct rzg2l_pinctrl *pctrl)
return 0;
}
static void rzg2l_pinctrl_clk_disable(void *data)
{
clk_disable_unprepare(data);
}
static int rzg2l_pinctrl_probe(struct platform_device *pdev)
{
struct rzg2l_pinctrl *pctrl;
struct clk *clk;
int ret;
BUILD_BUG_ON(ARRAY_SIZE(rzg2l_gpio_configs) * RZG2L_PINS_PER_PORT >
......@@ -1489,33 +1496,16 @@ static int rzg2l_pinctrl_probe(struct platform_device *pdev)
if (IS_ERR(pctrl->base))
return PTR_ERR(pctrl->base);
pctrl->clk = devm_clk_get(pctrl->dev, NULL);
if (IS_ERR(pctrl->clk)) {
ret = PTR_ERR(pctrl->clk);
dev_err(pctrl->dev, "failed to get GPIO clk : %i\n", ret);
return ret;
}
clk = devm_clk_get_enabled(pctrl->dev, NULL);
if (IS_ERR(clk))
return dev_err_probe(pctrl->dev, PTR_ERR(clk),
"failed to enable GPIO clk\n");
spin_lock_init(&pctrl->lock);
spin_lock_init(&pctrl->bitmap_lock);
platform_set_drvdata(pdev, pctrl);
ret = clk_prepare_enable(pctrl->clk);
if (ret) {
dev_err(pctrl->dev, "failed to enable GPIO clk: %i\n", ret);
return ret;
}
ret = devm_add_action_or_reset(&pdev->dev, rzg2l_pinctrl_clk_disable,
pctrl->clk);
if (ret) {
dev_err(pctrl->dev,
"failed to register GPIO clk disable action, %i\n",
ret);
return ret;
}
ret = rzg2l_pinctrl_register(pctrl);
if (ret)
return ret;
......
drivers/pinctrl/renesas/pinctrl-rzv2m.c
View file @ 046d3546
......@@ -119,7 +119,6 @@ struct rzv2m_pinctrl {
const struct rzv2m_pinctrl_data *data;
void __iomem *base;
struct device *dev;
struct clk *clk;
struct gpio_chip gpio_chip;
struct pinctrl_gpio_range gpio_range;
......@@ -210,6 +209,7 @@ static int rzv2m_map_add_config(struct pinctrl_map *map,
static int rzv2m_dt_subnode_to_map(struct pinctrl_dev *pctldev,
struct device_node *np,
struct device_node *parent,
struct pinctrl_map **map,
unsigned int *num_maps,
unsigned int *index)
......@@ -227,6 +227,7 @@ static int rzv2m_dt_subnode_to_map(struct pinctrl_dev *pctldev,
struct property *prop;
int ret, gsel, fsel;
const char **pin_fn;
const char *name;
const char *pin;
pinmux = of_find_property(np, "pinmux", NULL);
......@@ -310,8 +311,19 @@ static int rzv2m_dt_subnode_to_map(struct pinctrl_dev *pctldev,
psel_val[i] = MUX_FUNC(value);
}
if (parent) {
name = devm_kasprintf(pctrl->dev, GFP_KERNEL, "%pOFn.%pOFn",
parent, np);
if (!name) {
ret = -ENOMEM;
goto done;
}
} else {
name = np->name;
}
/* Register a single pin group listing all the pins we read from DT */
gsel = pinctrl_generic_add_group(pctldev, np->name, pins, num_pinmux, NULL);
gsel = pinctrl_generic_add_group(pctldev, name, pins, num_pinmux, NULL);
if (gsel < 0) {
ret = gsel;
goto done;
......@@ -321,17 +333,16 @@ static int rzv2m_dt_subnode_to_map(struct pinctrl_dev *pctldev,
* Register a single group function where the 'data' is an array PSEL
* register values read from DT.
*/
pin_fn[0] = np->name;
fsel = pinmux_generic_add_function(pctldev, np->name, pin_fn, 1,
psel_val);
pin_fn[0] = name;
fsel = pinmux_generic_add_function(pctldev, name, pin_fn, 1, psel_val);
if (fsel < 0) {
ret = fsel;
goto remove_group;
}
maps[idx].type = PIN_MAP_TYPE_MUX_GROUP;
maps[idx].data.mux.group = np->name;
maps[idx].data.mux.function = np->name;
maps[idx].data.mux.group = name;
maps[idx].data.mux.function = name;
idx++;
dev_dbg(pctrl->dev, "Parsed %pOF with %d pins\n", np, num_pinmux);
......@@ -378,7 +389,7 @@ static int rzv2m_dt_node_to_map(struct pinctrl_dev *pctldev,
index = 0;
for_each_child_of_node(np, child) {
ret = rzv2m_dt_subnode_to_map(pctldev, child, map,
ret = rzv2m_dt_subnode_to_map(pctldev, child, np, map,
num_maps, &index);
if (ret < 0) {
of_node_put(child);
......@@ -387,7 +398,7 @@ static int rzv2m_dt_node_to_map(struct pinctrl_dev *pctldev,
}
if (*num_maps == 0) {
ret = rzv2m_dt_subnode_to_map(pctldev, np, map,
ret = rzv2m_dt_subnode_to_map(pctldev, np, NULL, map,
num_maps, &index);
if (ret < 0)
goto done;
......@@ -1028,14 +1039,10 @@ static int rzv2m_pinctrl_register(struct rzv2m_pinctrl *pctrl)
return 0;
}
static void rzv2m_pinctrl_clk_disable(void *data)
{
clk_disable_unprepare(data);
}
static int rzv2m_pinctrl_probe(struct platform_device *pdev)
{
struct rzv2m_pinctrl *pctrl;
struct clk *clk;
int ret;
pctrl = devm_kzalloc(&pdev->dev, sizeof(*pctrl), GFP_KERNEL);
......@@ -1052,32 +1059,15 @@ static int rzv2m_pinctrl_probe(struct platform_device *pdev)
if (IS_ERR(pctrl->base))
return PTR_ERR(pctrl->base);
pctrl->clk = devm_clk_get(pctrl->dev, NULL);
if (IS_ERR(pctrl->clk)) {
ret = PTR_ERR(pctrl->clk);
dev_err(pctrl->dev, "failed to get GPIO clk : %i\n", ret);
return ret;
}
clk = devm_clk_get_enabled(pctrl->dev, NULL);
if (IS_ERR(clk))
return dev_err_probe(pctrl->dev, PTR_ERR(clk),
"failed to enable GPIO clk\n");
spin_lock_init(&pctrl->lock);
platform_set_drvdata(pdev, pctrl);
ret = clk_prepare_enable(pctrl->clk);
if (ret) {
dev_err(pctrl->dev, "failed to enable GPIO clk: %i\n", ret);
return ret;
}
ret = devm_add_action_or_reset(&pdev->dev, rzv2m_pinctrl_clk_disable,
pctrl->clk);
if (ret) {
dev_err(pctrl->dev,
"failed to register GPIO clk disable action, %i\n",
ret);
return ret;
}
ret = rzv2m_pinctrl_register(pctrl);
if (ret)
return ret;
......
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