Commit 056d3857 authored by Krzysztof Kozlowski's avatar Krzysztof Kozlowski Committed by Rob Herring

dt-bindings: i2c: samsung,s3c2410-i2c: convert to dtschema

Convert the Samsung S3C24xx/S3C64xx/S5PV210/Exynos SoC I2C Controller
bindings to DT schema format.

The conversion includes also changes/fixes to the bindings, matching the
real hardware and existing Linux driver:
1. Do not require interrupts on samsung,exynos5-sata-phy-i2c, because
   there is no such.
2. Do not allow gpios on samsung,exynos5-sata-phy-i2c, because they are
   hard-wired just like for HDMI phy.
3. Do not require samsung,i2c-sda-delay and use default of 0.
4. Require clock, which was always required but missing in bindings.
Signed-off-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: default avatarRob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220131172713.208976-1-krzysztof.kozlowski@canonical.com
parent d029175f
* Samsung's I2C controller
The Samsung's I2C controller is used to interface with I2C devices.
Required properties:
- compatible: value should be either of the following.
(a) "samsung, s3c2410-i2c", for i2c compatible with s3c2410 i2c.
(b) "samsung, s3c2440-i2c", for i2c compatible with s3c2440 i2c.
(c) "samsung, s3c2440-hdmiphy-i2c", for s3c2440-like i2c used
inside HDMIPHY block found on several samsung SoCs
(d) "samsung, exynos5-sata-phy-i2c", for s3c2440-like i2c used as
a host to SATA PHY controller on an internal bus.
- reg: physical base address of the controller and length of memory mapped
region.
- interrupts: interrupt number to the cpu.
- samsung,i2c-sda-delay: Delay (in ns) applied to data line (SDA) edges.
Required for all cases except "samsung,s3c2440-hdmiphy-i2c":
- Samsung GPIO variant (deprecated):
- gpios: The order of the gpios should be the following: <SDA, SCL>.
The gpio specifier depends on the gpio controller. Required in all
cases except for "samsung,s3c2440-hdmiphy-i2c" whose input/output
lines are permanently wired to the respective clienta
- Pinctrl variant (preferred, if available):
- pinctrl-0: Pin control group to be used for this controller.
- pinctrl-names: Should contain only one value - "default".
Optional properties:
- samsung,i2c-slave-addr: Slave address in multi-master environment. If not
specified, default value is 0.
- samsung,i2c-max-bus-freq: Desired frequency in Hz of the bus. If not
specified, the default value in Hz is 100000.
- samsung,sysreg-phandle - handle to syscon used to control the system registers
Example:
i2c@13870000 {
compatible = "samsung,s3c2440-i2c";
reg = <0x13870000 0x100>;
interrupts = <345>;
samsung,i2c-sda-delay = <100>;
samsung,i2c-max-bus-freq = <100000>;
/* Samsung GPIO variant begins here */
gpios = <&gpd1 2 0 /* SDA */
&gpd1 3 0 /* SCL */>;
/* Samsung GPIO variant ends here */
/* Pinctrl variant begins here */
pinctrl-0 = <&i2c3_bus>;
pinctrl-names = "default";
/* Pinctrl variant ends here */
#address-cells = <1>;
#size-cells = <0>;
wm8994@1a {
compatible = "wlf,wm8994";
reg = <0x1a>;
};
};
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/i2c/samsung,s3c2410-i2c.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Samsung S3C/S5P/Exynos SoC I2C Controller
maintainers:
- Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
properties:
compatible:
enum:
- samsung,s3c2410-i2c
- samsung,s3c2440-i2c
# For s3c2440-like I2C used inside HDMIPHY block found on several SoCs:
- samsung,s3c2440-hdmiphy-i2c
# For s3c2440-like I2C used as a host to SATA PHY controller on an
# internal bus:
- samsung,exynos5-sata-phy-i2c
'#address-cells':
const: 1
clocks:
maxItems: 1
clock-names:
items:
- const: i2c
gpios:
description: |
The order of the GPIOs should be the following:: <SDA, SCL>. The GPIO
specifier depends on the gpio controller. Required in all cases except
for "samsung,s3c2440-hdmiphy-i2c" whose input/output lines are
permanently wired to the respective client.
This property is deprecated. Use "pinctrl-0" and "pinctrl-names" instead.
deprecated: yes
interrupts:
maxItems: 1
reg:
maxItems: 1
samsung,i2c-max-bus-freq:
$ref: /schemas/types.yaml#/definitions/uint32
description:
Desired frequency in Hz of the bus.
default: 100000
samsung,i2c-sda-delay:
$ref: /schemas/types.yaml#/definitions/uint32
description:
Delay (in ns) applied to data line (SDA) edges.
default: 0
samsung,i2c-slave-addr:
$ref: /schemas/types.yaml#/definitions/uint32
description:
Slave address in multi-master environment.
default: 0
samsung,sysreg-phandle:
$ref: /schemas/types.yaml#/definitions/phandle
description: Pandle to syscon used to control the system registers.
'#size-cells':
const: 0
required:
- compatible
- reg
allOf:
- $ref: /schemas/i2c/i2c-controller.yaml#
- if:
properties:
compatible:
contains:
enum:
- samsung,s3c2440-hdmiphy-i2c
- samsung,exynos5-sata-phy-i2c
then:
properties:
gpios: false
- if:
properties:
compatible:
contains:
enum:
- samsung,s3c2410-i2c
- samsung,s3c2440-i2c
- samsung,s3c2440-hdmiphy-i2c
then:
required:
- interrupts
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/clock/exynos5250.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
i2c@12c60000 {
compatible = "samsung,s3c2440-i2c";
reg = <0x12C60000 0x100>;
interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clock CLK_I2C0>;
clock-names = "i2c";
pinctrl-names = "default";
pinctrl-0 = <&i2c0_bus>;
samsung,sysreg-phandle = <&sysreg_system_controller>;
samsung,i2c-sda-delay = <100>;
samsung,i2c-max-bus-freq = <20000>;
samsung,i2c-slave-addr = <0x66>;
eeprom@50 {
compatible = "samsung,s524ad0xd1";
reg = <0x50>;
};
};
i2c@12ce0000 {
compatible = "samsung,s3c2440-hdmiphy-i2c";
reg = <0x12CE0000 0x1000>;
interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clock CLK_I2C_HDMI>;
clock-names = "i2c";
samsung,i2c-sda-delay = <100>;
samsung,i2c-max-bus-freq = <66000>;
phy-i2c@38 {
compatible = "samsung,exynos4212-hdmiphy";
reg = <0x38>;
};
};
i2c@121d0000 {
compatible = "samsung,exynos5-sata-phy-i2c";
reg = <0x121D0000 0x100>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clock CLK_SATA_PHYI2C>;
clock-names = "i2c";
samsung,i2c-sda-delay = <100>;
samsung,i2c-max-bus-freq = <40000>;
phy-i2c@38 {
compatible = "samsung,exynos-sataphy-i2c";
reg = <0x38>;
};
};
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