Commit 0840a791 authored by Linus Torvalds's avatar Linus Torvalds

Merge tag 'char-misc-5.19-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc

Pull IIO driver fixes from Greg KH:
 "Here are a set of IIO driver fixes for 5.19-rc4. Jonathan said it best
  in his pull request to me, so I'll just quote it here below, as that's
  the only changes we have right now for the char-misc driver tree:

  testing:
      - Fix a missing MODULE_LICENSE() warning by restricting possible
        build configs.

  Various drivers:
      - Fix ordering of iio_get_trigger() being called before
        iio_trigger_register()

  adi,admv1014:
      - Fix dubious x & !y warning.

  adi,axi-adc:
      - Fix missing of_node_put() in error and normal paths.

  aspeed,adc:
      - Add missing of_node_put()

  fsl,mma8452:
      - Fix broken probing from device tree.
      - Drop check on return value of i2c write to device to cause reset
        as ACK will be missing (device reset before sending it).

  fsl,vf610:
      - Fix documentation of in_conversion_mode ABI.

  iio-trig-sysfs:
      - Ensure irq work has finished before freeing the trigger.

  invensense,mpu3050:
      - Disable regulators in error path.

  invensense,icm42600:
      - Fix collision of enum value of 0 with error path where 0 is no
        match.

  renesas,rzg2l_Adc:
      - Add missing fwnode_handle_put() in error path.

  rescale:
      - Fix a boolean logic bug for detection of raw + scale affecting
        an obscure corner case.

  semtech,sx9324:
      - Check return value of read of pin_defs

  st,stm32-adc:
      - Fix interaction across ADC instances for some supported devices.
      - Drop false spurious IRQ messages.
      - Fix calibration value handling. If we can't calibrate don't
        expose the vref_int channel.
      - Fix maximum clock rate for stm32pm15x

  ti,ads131e08:
      - Add missing fwnode_handle_put() in error paths.

  xilinx,ams:
      - Fix variable checked for error from platform_get_irq()

  x-powers,axp288:
      - Overide TS_PIN bias current for boards where it is not correctly
        initialized.

  yamaha,yas530:
      - Fix inverted check on calibration data being all zeros.

  All of these have been in linux-next for a while with no reported
  problems"

* tag 'char-misc-5.19-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (26 commits)
  iio:proximity:sx9324: Check ret value of device_property_read_u32_array()
  iio: accel: mma8452: ignore the return value of reset operation
  iio: adc: stm32: fix maximum clock rate for stm32mp15x
  iio: adc: stm32: fix vrefint wrong calibration value handling
  iio: imu: inv_icm42600: Fix broken icm42600 (chip id 0 value)
  iio: adc: vf610: fix conversion mode sysfs node name
  iio: adc: adi-axi-adc: Fix refcount leak in adi_axi_adc_attach_client
  iio: test: fix missing MODULE_LICENSE for IIO_RESCALE=m
  iio:humidity:hts221: rearrange iio trigger get and register
  iio:chemical:ccs811: rearrange iio trigger get and register
  iio:accel:mxc4005: rearrange iio trigger get and register
  iio:accel:kxcjk-1013: rearrange iio trigger get and register
  iio:accel:bma180: rearrange iio trigger get and register
  iio: afe: rescale: Fix boolean logic bug
  iio: adc: aspeed: Fix refcount leak in aspeed_adc_set_trim_data
  iio: adc: stm32: Fix IRQs on STM32F4 by removing custom spurious IRQs message
  iio: adc: stm32: Fix ADCs iteration in irq handler
  iio: adc: ti-ads131e08: add missing fwnode_handle_put() in ads131e08_alloc_channels()
  iio: adc: rzg2l_adc: add missing fwnode_handle_put() in rzg2l_adc_parse_properties()
  iio: trigger: sysfs: fix use-after-free on remove
  ...
parents c24eb8d6 315f7e15
What: /sys/bus/iio/devices/iio:deviceX/conversion_mode
What: /sys/bus/iio/devices/iio:deviceX/in_conversion_mode
KernelVersion: 4.2
Contact: linux-iio@vger.kernel.org
Description:
......
......@@ -1006,11 +1006,12 @@ static int bma180_probe(struct i2c_client *client,
data->trig->ops = &bma180_trigger_ops;
iio_trigger_set_drvdata(data->trig, indio_dev);
indio_dev->trig = iio_trigger_get(data->trig);
ret = iio_trigger_register(data->trig);
if (ret)
goto err_trigger_free;
indio_dev->trig = iio_trigger_get(data->trig);
}
ret = iio_triggered_buffer_setup(indio_dev, NULL,
......
......@@ -1554,12 +1554,12 @@ static int kxcjk1013_probe(struct i2c_client *client,
data->dready_trig->ops = &kxcjk1013_trigger_ops;
iio_trigger_set_drvdata(data->dready_trig, indio_dev);
indio_dev->trig = data->dready_trig;
iio_trigger_get(indio_dev->trig);
ret = iio_trigger_register(data->dready_trig);
if (ret)
goto err_poweroff;
indio_dev->trig = iio_trigger_get(data->dready_trig);
data->motion_trig->ops = &kxcjk1013_trigger_ops;
iio_trigger_set_drvdata(data->motion_trig, indio_dev);
ret = iio_trigger_register(data->motion_trig);
......
......@@ -1511,10 +1511,14 @@ static int mma8452_reset(struct i2c_client *client)
int i;
int ret;
ret = i2c_smbus_write_byte_data(client, MMA8452_CTRL_REG2,
/*
* Find on fxls8471, after config reset bit, it reset immediately,
* and will not give ACK, so here do not check the return value.
* The following code will read the reset register, and check whether
* this reset works.
*/
i2c_smbus_write_byte_data(client, MMA8452_CTRL_REG2,
MMA8452_CTRL_REG2_RST);
if (ret < 0)
return ret;
for (i = 0; i < 10; i++) {
usleep_range(100, 200);
......@@ -1557,11 +1561,13 @@ static int mma8452_probe(struct i2c_client *client,
mutex_init(&data->lock);
data->chip_info = device_get_match_data(&client->dev);
if (!data->chip_info && id) {
data->chip_info = &mma_chip_info_table[id->driver_data];
} else {
dev_err(&client->dev, "unknown device model\n");
return -ENODEV;
if (!data->chip_info) {
if (id) {
data->chip_info = &mma_chip_info_table[id->driver_data];
} else {
dev_err(&client->dev, "unknown device model\n");
return -ENODEV;
}
}
ret = iio_read_mount_matrix(&client->dev, &data->orientation);
......
......@@ -456,8 +456,6 @@ static int mxc4005_probe(struct i2c_client *client,
data->dready_trig->ops = &mxc4005_trigger_ops;
iio_trigger_set_drvdata(data->dready_trig, indio_dev);
indio_dev->trig = data->dready_trig;
iio_trigger_get(indio_dev->trig);
ret = devm_iio_trigger_register(&client->dev,
data->dready_trig);
if (ret) {
......@@ -465,6 +463,8 @@ static int mxc4005_probe(struct i2c_client *client,
"failed to register trigger\n");
return ret;
}
indio_dev->trig = iio_trigger_get(data->dready_trig);
}
return devm_iio_device_register(&client->dev, indio_dev);
......
......@@ -322,16 +322,19 @@ static struct adi_axi_adc_client *adi_axi_adc_attach_client(struct device *dev)
if (!try_module_get(cl->dev->driver->owner)) {
mutex_unlock(&registered_clients_lock);
of_node_put(cln);
return ERR_PTR(-ENODEV);
}
get_device(cl->dev);
cl->info = info;
mutex_unlock(&registered_clients_lock);
of_node_put(cln);
return cl;
}
mutex_unlock(&registered_clients_lock);
of_node_put(cln);
return ERR_PTR(-EPROBE_DEFER);
}
......
......@@ -186,6 +186,7 @@ static int aspeed_adc_set_trim_data(struct iio_dev *indio_dev)
return -EOPNOTSUPP;
}
scu = syscon_node_to_regmap(syscon);
of_node_put(syscon);
if (IS_ERR(scu)) {
dev_warn(data->dev, "Failed to get syscon regmap\n");
return -EOPNOTSUPP;
......
......@@ -196,6 +196,14 @@ static const struct dmi_system_id axp288_adc_ts_bias_override[] = {
},
.driver_data = (void *)(uintptr_t)AXP288_ADC_TS_BIAS_80UA,
},
{
/* Nuvision Solo 10 Draw */
.matches = {
DMI_MATCH(DMI_SYS_VENDOR, "TMAX"),
DMI_MATCH(DMI_PRODUCT_NAME, "TM101W610L"),
},
.driver_data = (void *)(uintptr_t)AXP288_ADC_TS_BIAS_80UA,
},
{}
};
......
......@@ -334,11 +334,15 @@ static int rzg2l_adc_parse_properties(struct platform_device *pdev, struct rzg2l
i = 0;
device_for_each_child_node(&pdev->dev, fwnode) {
ret = fwnode_property_read_u32(fwnode, "reg", &channel);
if (ret)
if (ret) {
fwnode_handle_put(fwnode);
return ret;
}
if (channel >= RZG2L_ADC_MAX_CHANNELS)
if (channel >= RZG2L_ADC_MAX_CHANNELS) {
fwnode_handle_put(fwnode);
return -EINVAL;
}
chan_array[i].type = IIO_VOLTAGE;
chan_array[i].indexed = 1;
......
......@@ -64,6 +64,7 @@ struct stm32_adc_priv;
* @max_clk_rate_hz: maximum analog clock rate (Hz, from datasheet)
* @has_syscfg: SYSCFG capability flags
* @num_irqs: number of interrupt lines
* @num_adcs: maximum number of ADC instances in the common registers
*/
struct stm32_adc_priv_cfg {
const struct stm32_adc_common_regs *regs;
......@@ -71,6 +72,7 @@ struct stm32_adc_priv_cfg {
u32 max_clk_rate_hz;
unsigned int has_syscfg;
unsigned int num_irqs;
unsigned int num_adcs;
};
/**
......@@ -352,7 +354,7 @@ static void stm32_adc_irq_handler(struct irq_desc *desc)
* before invoking the interrupt handler (e.g. call ISR only for
* IRQ-enabled ADCs).
*/
for (i = 0; i < priv->cfg->num_irqs; i++) {
for (i = 0; i < priv->cfg->num_adcs; i++) {
if ((status & priv->cfg->regs->eoc_msk[i] &&
stm32_adc_eoc_enabled(priv, i)) ||
(status & priv->cfg->regs->ovr_msk[i]))
......@@ -792,6 +794,7 @@ static const struct stm32_adc_priv_cfg stm32f4_adc_priv_cfg = {
.clk_sel = stm32f4_adc_clk_sel,
.max_clk_rate_hz = 36000000,
.num_irqs = 1,
.num_adcs = 3,
};
static const struct stm32_adc_priv_cfg stm32h7_adc_priv_cfg = {
......@@ -800,14 +803,16 @@ static const struct stm32_adc_priv_cfg stm32h7_adc_priv_cfg = {
.max_clk_rate_hz = 36000000,
.has_syscfg = HAS_VBOOSTER,
.num_irqs = 1,
.num_adcs = 2,
};
static const struct stm32_adc_priv_cfg stm32mp1_adc_priv_cfg = {
.regs = &stm32h7_adc_common_regs,
.clk_sel = stm32h7_adc_clk_sel,
.max_clk_rate_hz = 40000000,
.max_clk_rate_hz = 36000000,
.has_syscfg = HAS_VBOOSTER | HAS_ANASWVDD,
.num_irqs = 2,
.num_adcs = 2,
};
static const struct of_device_id stm32_adc_of_match[] = {
......
......@@ -1365,7 +1365,7 @@ static int stm32_adc_read_raw(struct iio_dev *indio_dev,
else
ret = -EINVAL;
if (mask == IIO_CHAN_INFO_PROCESSED && adc->vrefint.vrefint_cal)
if (mask == IIO_CHAN_INFO_PROCESSED)
*val = STM32_ADC_VREFINT_VOLTAGE * adc->vrefint.vrefint_cal / *val;
iio_device_release_direct_mode(indio_dev);
......@@ -1407,7 +1407,6 @@ static irqreturn_t stm32_adc_threaded_isr(int irq, void *data)
struct stm32_adc *adc = iio_priv(indio_dev);
const struct stm32_adc_regspec *regs = adc->cfg->regs;
u32 status = stm32_adc_readl(adc, regs->isr_eoc.reg);
u32 mask = stm32_adc_readl(adc, regs->ier_eoc.reg);
/* Check ovr status right now, as ovr mask should be already disabled */
if (status & regs->isr_ovr.mask) {
......@@ -1422,11 +1421,6 @@ static irqreturn_t stm32_adc_threaded_isr(int irq, void *data)
return IRQ_HANDLED;
}
if (!(status & mask))
dev_err_ratelimited(&indio_dev->dev,
"Unexpected IRQ: IER=0x%08x, ISR=0x%08x\n",
mask, status);
return IRQ_NONE;
}
......@@ -1436,10 +1430,6 @@ static irqreturn_t stm32_adc_isr(int irq, void *data)
struct stm32_adc *adc = iio_priv(indio_dev);
const struct stm32_adc_regspec *regs = adc->cfg->regs;
u32 status = stm32_adc_readl(adc, regs->isr_eoc.reg);
u32 mask = stm32_adc_readl(adc, regs->ier_eoc.reg);
if (!(status & mask))
return IRQ_WAKE_THREAD;
if (status & regs->isr_ovr.mask) {
/*
......@@ -1979,10 +1969,10 @@ static int stm32_adc_populate_int_ch(struct iio_dev *indio_dev, const char *ch_n
for (i = 0; i < STM32_ADC_INT_CH_NB; i++) {
if (!strncmp(stm32_adc_ic[i].name, ch_name, STM32_ADC_CH_SZ)) {
adc->int_ch[i] = chan;
if (stm32_adc_ic[i].idx != STM32_ADC_INT_CH_VREFINT)
continue;
if (stm32_adc_ic[i].idx != STM32_ADC_INT_CH_VREFINT) {
adc->int_ch[i] = chan;
break;
}
/* Get calibration data for vrefint channel */
ret = nvmem_cell_read_u16(&indio_dev->dev, "vrefint", &vrefint);
......@@ -1990,10 +1980,15 @@ static int stm32_adc_populate_int_ch(struct iio_dev *indio_dev, const char *ch_n
return dev_err_probe(indio_dev->dev.parent, ret,
"nvmem access error\n");
}
if (ret == -ENOENT)
dev_dbg(&indio_dev->dev, "vrefint calibration not found\n");
else
adc->vrefint.vrefint_cal = vrefint;
if (ret == -ENOENT) {
dev_dbg(&indio_dev->dev, "vrefint calibration not found. Skip vrefint channel\n");
return ret;
} else if (!vrefint) {
dev_dbg(&indio_dev->dev, "Null vrefint calibration value. Skip vrefint channel\n");
return -ENOENT;
}
adc->int_ch[i] = chan;
adc->vrefint.vrefint_cal = vrefint;
}
}
......@@ -2030,7 +2025,9 @@ static int stm32_adc_generic_chan_init(struct iio_dev *indio_dev,
}
strncpy(adc->chan_name[val], name, STM32_ADC_CH_SZ);
ret = stm32_adc_populate_int_ch(indio_dev, name, val);
if (ret)
if (ret == -ENOENT)
continue;
else if (ret)
goto err;
} else if (ret != -EINVAL) {
dev_err(&indio_dev->dev, "Invalid label %d\n", ret);
......
......@@ -739,7 +739,7 @@ static int ads131e08_alloc_channels(struct iio_dev *indio_dev)
device_for_each_child_node(dev, node) {
ret = fwnode_property_read_u32(node, "reg", &channel);
if (ret)
return ret;
goto err_child_out;
ret = fwnode_property_read_u32(node, "ti,gain", &tmp);
if (ret) {
......@@ -747,7 +747,7 @@ static int ads131e08_alloc_channels(struct iio_dev *indio_dev)
} else {
ret = ads131e08_pga_gain_to_field_value(st, tmp);
if (ret < 0)
return ret;
goto err_child_out;
channel_config[i].pga_gain = tmp;
}
......@@ -758,7 +758,7 @@ static int ads131e08_alloc_channels(struct iio_dev *indio_dev)
} else {
ret = ads131e08_validate_channel_mux(st, tmp);
if (ret)
return ret;
goto err_child_out;
channel_config[i].mux = tmp;
}
......@@ -784,6 +784,10 @@ static int ads131e08_alloc_channels(struct iio_dev *indio_dev)
st->channel_config = channel_config;
return 0;
err_child_out:
fwnode_handle_put(node);
return ret;
}
static void ads131e08_regulator_disable(void *data)
......
......@@ -1409,7 +1409,7 @@ static int ams_probe(struct platform_device *pdev)
irq = platform_get_irq(pdev, 0);
if (irq < 0)
return ret;
return irq;
ret = devm_request_irq(&pdev->dev, irq, &ams_irq, 0, "ams-irq",
indio_dev);
......
......@@ -277,7 +277,7 @@ static int rescale_configure_channel(struct device *dev,
chan->ext_info = rescale->ext_info;
chan->type = rescale->cfg->type;
if (iio_channel_has_info(schan, IIO_CHAN_INFO_RAW) ||
if (iio_channel_has_info(schan, IIO_CHAN_INFO_RAW) &&
iio_channel_has_info(schan, IIO_CHAN_INFO_SCALE)) {
dev_info(dev, "using raw+scale source channel\n");
} else if (iio_channel_has_info(schan, IIO_CHAN_INFO_PROCESSED)) {
......
......@@ -499,11 +499,11 @@ static int ccs811_probe(struct i2c_client *client,
data->drdy_trig->ops = &ccs811_trigger_ops;
iio_trigger_set_drvdata(data->drdy_trig, indio_dev);
indio_dev->trig = data->drdy_trig;
iio_trigger_get(indio_dev->trig);
ret = iio_trigger_register(data->drdy_trig);
if (ret)
goto err_poweroff;
indio_dev->trig = iio_trigger_get(data->drdy_trig);
}
ret = iio_triggered_buffer_setup(indio_dev, NULL,
......
......@@ -700,8 +700,10 @@ static int admv1014_init(struct admv1014_state *st)
ADMV1014_DET_EN_MSK;
enable_reg = FIELD_PREP(ADMV1014_P1DB_COMPENSATION_MSK, st->p1db_comp ? 3 : 0) |
FIELD_PREP(ADMV1014_IF_AMP_PD_MSK, !(st->input_mode)) |
FIELD_PREP(ADMV1014_BB_AMP_PD_MSK, st->input_mode) |
FIELD_PREP(ADMV1014_IF_AMP_PD_MSK,
(st->input_mode == ADMV1014_IF_MODE) ? 0 : 1) |
FIELD_PREP(ADMV1014_BB_AMP_PD_MSK,
(st->input_mode == ADMV1014_IF_MODE) ? 1 : 0) |
FIELD_PREP(ADMV1014_DET_EN_MSK, st->det_en);
return __admv1014_spi_update_bits(st, ADMV1014_REG_ENABLE, enable_reg_msk, enable_reg);
......
......@@ -875,6 +875,7 @@ static int mpu3050_power_up(struct mpu3050 *mpu3050)
ret = regmap_update_bits(mpu3050->map, MPU3050_PWR_MGM,
MPU3050_PWR_MGM_SLEEP, 0);
if (ret) {
regulator_bulk_disable(ARRAY_SIZE(mpu3050->regs), mpu3050->regs);
dev_err(mpu3050->dev, "error setting power mode\n");
return ret;
}
......
......@@ -135,9 +135,12 @@ int hts221_allocate_trigger(struct iio_dev *iio_dev)
iio_trigger_set_drvdata(hw->trig, iio_dev);
hw->trig->ops = &hts221_trigger_ops;
err = devm_iio_trigger_register(hw->dev, hw->trig);
iio_dev->trig = iio_trigger_get(hw->trig);
return devm_iio_trigger_register(hw->dev, hw->trig);
return err;
}
static int hts221_buffer_preenable(struct iio_dev *iio_dev)
......
......@@ -17,6 +17,7 @@
#include "inv_icm42600_buffer.h"
enum inv_icm42600_chip {
INV_CHIP_INVALID,
INV_CHIP_ICM42600,
INV_CHIP_ICM42602,
INV_CHIP_ICM42605,
......
......@@ -565,7 +565,7 @@ int inv_icm42600_core_probe(struct regmap *regmap, int chip, int irq,
bool open_drain;
int ret;
if (chip < 0 || chip >= INV_CHIP_NB) {
if (chip <= INV_CHIP_INVALID || chip >= INV_CHIP_NB) {
dev_err(dev, "invalid chip = %d\n", chip);
return -ENODEV;
}
......
......@@ -639,7 +639,7 @@ static int yas532_get_calibration_data(struct yas5xx *yas5xx)
dev_dbg(yas5xx->dev, "calibration data: %*ph\n", 14, data);
/* Sanity check, is this all zeroes? */
if (memchr_inv(data, 0x00, 13)) {
if (memchr_inv(data, 0x00, 13) == NULL) {
if (!(data[13] & BIT(7)))
dev_warn(yas5xx->dev, "calibration is blank!\n");
}
......
......@@ -885,6 +885,9 @@ sx9324_get_default_reg(struct device *dev, int idx,
break;
ret = device_property_read_u32_array(dev, prop, pin_defs,
ARRAY_SIZE(pin_defs));
if (ret)
break;
for (pin = 0; pin < SX9324_NUM_PINS; pin++)
raw |= (pin_defs[pin] << (2 * pin)) &
SX9324_REG_AFE_PH0_PIN_MASK(pin);
......
......@@ -6,7 +6,7 @@
# Keep in alphabetical order
config IIO_RESCALE_KUNIT_TEST
bool "Test IIO rescale conversion functions"
depends on KUNIT=y && !IIO_RESCALE
depends on KUNIT=y && IIO_RESCALE=y
default KUNIT_ALL_TESTS
help
If you want to run tests on the iio-rescale code say Y here.
......
......@@ -4,6 +4,6 @@
#
# Keep in alphabetical order
obj-$(CONFIG_IIO_RESCALE_KUNIT_TEST) += iio-test-rescale.o ../afe/iio-rescale.o
obj-$(CONFIG_IIO_RESCALE_KUNIT_TEST) += iio-test-rescale.o
obj-$(CONFIG_IIO_TEST_FORMAT) += iio-test-format.o
CFLAGS_iio-test-format.o += $(DISABLE_STRUCTLEAK_PLUGIN)
......@@ -190,6 +190,7 @@ static int iio_sysfs_trigger_remove(int id)
}
iio_trigger_unregister(t->trig);
irq_work_sync(&t->work);
iio_trigger_free(t->trig);
list_del(&t->l);
......
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