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Commit 0858d9c0 authored by Paul Mundt's avatar Paul Mundt
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Merge branch 'sh/hwblk' into sh/pm-runtime

parents 9d730229 963e04ca
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Showing with 6560 additions and 1585 deletions
arch/sh/Kconfig
View file @ 0858d9c0
......@@ -10,12 +10,16 @@ config SUPERH
select EMBEDDED
select HAVE_CLK
select HAVE_IDE
select HAVE_LMB
select HAVE_OPROFILE
select HAVE_GENERIC_DMA_COHERENT
select HAVE_IOREMAP_PROT if MMU
select HAVE_ARCH_TRACEHOOK
select HAVE_DMA_API_DEBUG
select HAVE_PERF_COUNTERS
select HAVE_KERNEL_GZIP
select HAVE_KERNEL_BZIP2
select HAVE_KERNEL_LZMA
select RTC_LIB
select GENERIC_ATOMIC64
help
......@@ -31,6 +35,9 @@ config SUPERH32
select HAVE_FUNCTION_TRACER
select HAVE_FTRACE_MCOUNT_RECORD
select HAVE_DYNAMIC_FTRACE
select HAVE_FUNCTION_TRACE_MCOUNT_TEST
select HAVE_FTRACE_SYSCALLS
select HAVE_FUNCTION_GRAPH_TRACER
select HAVE_ARCH_KGDB
select ARCH_HIBERNATION_POSSIBLE if MMU
......
arch/sh/Kconfig.debug
View file @ 0858d9c0
......@@ -38,11 +38,12 @@ config EARLY_SCIF_CONSOLE_PORT
default "0xffe00000" if CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7763 || \
CPU_SUBTYPE_SH7722 || CPU_SUBTYPE_SH7366 || \
CPU_SUBTYPE_SH7343
default "0xffea0000" if CPU_SUBTYPE_SH7785
default "0xffeb0000" if CPU_SUBTYPE_SH7785
default "0xffeb0000" if CPU_SUBTYPE_SH7786
default "0xfffe8000" if CPU_SUBTYPE_SH7203
default "0xfffe9800" if CPU_SUBTYPE_SH7206 || CPU_SUBTYPE_SH7263
default "0xffe80000" if CPU_SH4
default "0xa4000150" if CPU_SH3
default "0x00000000"
config EARLY_PRINTK
......@@ -61,12 +62,14 @@ config EARLY_PRINTK
select both the EARLY_SCIF_CONSOLE and SH_STANDARD_BIOS, using
the kernel command line option to toggle back and forth.
config DEBUG_STACKOVERFLOW
config STACK_DEBUG
bool "Check for stack overflows"
depends on DEBUG_KERNEL && SUPERH32
help
This option will cause messages to be printed if free stack space
drops below a certain limit.
drops below a certain limit. Saying Y here will add overhead to
every function call and will therefore incur a major
performance hit. Most users should say N.
config DEBUG_STACK_USAGE
bool "Stack utilization instrumentation"
......@@ -107,6 +110,14 @@ config DUMP_CODE
Those looking for more verbose debugging output should say Y.
config DWARF_UNWINDER
bool "Enable the DWARF unwinder for stacktraces"
select FRAME_POINTER
default n
help
Enabling this option will make stacktraces more accurate, at
the cost of an increase in overall kernel size.
config SH_NO_BSS_INIT
bool "Avoid zeroing BSS (to speed-up startup on suitable platforms)"
depends on DEBUG_KERNEL
......@@ -123,4 +134,9 @@ config SH64_SR_WATCH
bool "Debug: set SR.WATCH to enable hardware watchpoints and trace"
depends on SUPERH64
config MCOUNT
def_bool y
depends on SUPERH32
depends on STACK_DEBUG || FUNCTION_TRACER
endmenu
arch/sh/Makefile
View file @ 0858d9c0
......@@ -136,6 +136,7 @@ machdir-$(CONFIG_SH_7751_SYSTEMH) += mach-systemh
machdir-$(CONFIG_SH_EDOSK7705) += mach-edosk7705
machdir-$(CONFIG_SH_HIGHLANDER) += mach-highlander
machdir-$(CONFIG_SH_MIGOR) += mach-migor
machdir-$(CONFIG_SH_KFR2R09) += mach-kfr2r09
machdir-$(CONFIG_SH_SDK7780) += mach-sdk7780
machdir-$(CONFIG_SH_X3PROTO) += mach-x3proto
machdir-$(CONFIG_SH_SH7763RDP) += mach-sh7763rdp
......@@ -186,17 +187,27 @@ KBUILD_CFLAGS += -pipe $(cflags-y)
KBUILD_CPPFLAGS += $(cflags-y)
KBUILD_AFLAGS += $(cflags-y)
ifeq ($(CONFIG_MCOUNT),y)
KBUILD_CFLAGS += -pg
endif
ifeq ($(CONFIG_DWARF_UNWINDER),y)
KBUILD_CFLAGS += -fasynchronous-unwind-tables
endif
libs-$(CONFIG_SUPERH32) := arch/sh/lib/ $(libs-y)
libs-$(CONFIG_SUPERH64) := arch/sh/lib64/ $(libs-y)
PHONY += maketools FORCE
BOOT_TARGETS = uImage uImage.bz2 uImage.gz uImage.lzma uImage.srec \
zImage vmlinux.srec romImage
PHONY += maketools $(BOOT_TARGETS) FORCE
maketools: include/linux/version.h FORCE
$(Q)$(MAKE) $(build)=arch/sh/tools include/asm-sh/machtypes.h
all: $(KBUILD_IMAGE)
zImage uImage uImage.srec vmlinux.srec: vmlinux
$(BOOT_TARGETS): vmlinux
$(Q)$(MAKE) $(build)=$(boot) $(boot)/$@
compressed: zImage
......@@ -208,10 +219,14 @@ archclean:
$(Q)$(MAKE) $(clean)=arch/sh/kernel/vsyscall
define archhelp
@echo '* zImage - Compressed kernel image'
@echo ' zImage - Compressed kernel image'
@echo ' romImage - Compressed ROM image, if supported'
@echo ' vmlinux.srec - Create an ELF S-record'
@echo ' uImage - Create a bootable image for U-Boot'
@echo ' uImage.srec - Create an S-record for U-Boot'
@echo '* uImage - Alias to bootable U-Boot image'
@echo ' uImage.srec - Create an S-record for U-Boot'
@echo '* uImage.gz - Kernel-only image for U-Boot (gzip)'
@echo ' uImage.bz2 - Kernel-only image for U-Boot (bzip2)'
@echo ' uImage.lzma - Kernel-only image for U-Boot (lzma)'
endef
CLEAN_FILES += include/asm-sh/machtypes.h
arch/sh/boards/Kconfig
View file @ 0858d9c0
......@@ -193,6 +193,13 @@ config SH_AP325RXA
Renesas "AP-325RXA" support.
Compatible with ALGO SYSTEM CO.,LTD. "AP-320A"
config SH_KFR2R09
bool "KFR2R09"
depends on CPU_SUBTYPE_SH7724
select ARCH_REQUIRE_GPIOLIB
help
"Kit For R2R for 2009" support.
config SH_SH7763RDP
bool "SH7763RDP"
depends on CPU_SUBTYPE_SH7763
......
arch/sh/boards/board-ap325rxa.c
View file @ 0858d9c0
......@@ -227,6 +227,9 @@ static struct platform_device lcdc_device = {
.dev = {
.platform_data = &lcdc_info,
},
.archdata = {
.hwblk_id = HWBLK_LCDC,
},
};
static void camera_power(int val)
......@@ -377,6 +380,9 @@ static struct platform_device ceu_device = {
.dev = {
.platform_data = &sh_mobile_ceu_info,
},
.archdata = {
.hwblk_id = HWBLK_CEU,
},
};
struct spi_gpio_platform_data sdcard_cn3_platform_data = {
......
arch/sh/boards/mach-highlander/setup.c
View file @ 0858d9c0
......@@ -22,6 +22,7 @@
#include <linux/irq.h>
#include <linux/interrupt.h>
#include <linux/usb/r8a66597.h>
#include <linux/usb/m66592.h>
#include <net/ax88796.h>
#include <asm/machvec.h>
#include <mach/highlander.h>
......@@ -60,6 +61,11 @@ static struct platform_device r8a66597_usb_host_device = {
.resource = r8a66597_usb_host_resources,
};
static struct m66592_platdata usbf_platdata = {
.xtal = M66592_PLATDATA_XTAL_24MHZ,
.vif = 1,
};
static struct resource m66592_usb_peripheral_resources[] = {
[0] = {
.name = "m66592_udc",
......@@ -81,6 +87,7 @@ static struct platform_device m66592_usb_peripheral_device = {
.dev = {
.dma_mask = NULL, /* don't use dma */
.coherent_dma_mask = 0xffffffff,
.platform_data = &usbf_platdata,
},
.num_resources = ARRAY_SIZE(m66592_usb_peripheral_resources),
.resource = m66592_usb_peripheral_resources,
......
arch/sh/boards/mach-kfr2r09/Makefile 0 → 100644
View file @ 0858d9c0
obj-y := setup.o
obj-$(CONFIG_FB_SH_MOBILE_LCDC) += lcd_wqvga.o
arch/sh/boards/mach-kfr2r09/lcd_wqvga.c 0 → 100644
View file @ 0858d9c0
/*
* KFR2R09 LCD panel support
*
* Copyright (C) 2009 Magnus Damm
*
* Register settings based on the out-of-tree t33fb.c driver
* Copyright (C) 2008 Lineo Solutions, Inc.
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file COPYING in the main directory of this archive for
* more details.
*/
#include <linux/delay.h>
#include <linux/err.h>
#include <linux/fb.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/gpio.h>
#include <video/sh_mobile_lcdc.h>
#include <mach/kfr2r09.h>
#include <cpu/sh7724.h>
/* The on-board LCD module is a Hitachi TX07D34VM0AAA. This module is made
* up of a 240x400 LCD hooked up to a R61517 driver IC. The driver IC is
* communicating with the main port of the LCDC using an 18-bit SYS interface.
*
* The device code for this LCD module is 0x01221517.
*/
static const unsigned char data_frame_if[] = {
0x02, /* WEMODE: 1=cont, 0=one-shot */
0x00, 0x00,
0x00, /* EPF, DFM */
0x02, /* RIM[1] : 1 (18bpp) */
};
static const unsigned char data_panel[] = {
0x0b,
0x63, /* 400 lines */
0x04, 0x00, 0x00, 0x04, 0x11, 0x00, 0x00,
};
static const unsigned char data_timing[] = {
0x00, 0x00, 0x13, 0x08, 0x08,
};
static const unsigned char data_timing_src[] = {
0x11, 0x01, 0x00, 0x01,
};
static const unsigned char data_gamma[] = {
0x01, 0x02, 0x08, 0x23, 0x03, 0x0c, 0x00, 0x06, 0x00, 0x00,
0x01, 0x00, 0x0c, 0x23, 0x03, 0x08, 0x02, 0x06, 0x00, 0x00,
};
static const unsigned char data_power[] = {
0x07, 0xc5, 0xdc, 0x02, 0x33, 0x0a,
};
static unsigned long read_reg(void *sohandle,
struct sh_mobile_lcdc_sys_bus_ops *so)
{
return so->read_data(sohandle);
}
static void write_reg(void *sohandle,
struct sh_mobile_lcdc_sys_bus_ops *so,
int i, unsigned long v)
{
if (i)
so->write_data(sohandle, v); /* PTH4/LCDRS High [param, 17:0] */
else
so->write_index(sohandle, v); /* PTH4/LCDRS Low [cmd, 7:0] */
}
static void write_data(void *sohandle,
struct sh_mobile_lcdc_sys_bus_ops *so,
unsigned char const *data, int no_data)
{
int i;
for (i = 0; i < no_data; i++)
write_reg(sohandle, so, 1, data[i]);
}
static unsigned long read_device_code(void *sohandle,
struct sh_mobile_lcdc_sys_bus_ops *so)
{
unsigned long device_code;
/* access protect OFF */
write_reg(sohandle, so, 0, 0xb0);
write_reg(sohandle, so, 1, 0x00);
/* deep standby OFF */
write_reg(sohandle, so, 0, 0xb1);
write_reg(sohandle, so, 1, 0x00);
/* device code command */
write_reg(sohandle, so, 0, 0xbf);
mdelay(50);
/* dummy read */
read_reg(sohandle, so);
/* read device code */
device_code = ((read_reg(sohandle, so) & 0xff) << 24);
device_code |= ((read_reg(sohandle, so) & 0xff) << 16);
device_code |= ((read_reg(sohandle, so) & 0xff) << 8);
device_code |= (read_reg(sohandle, so) & 0xff);
return device_code;
}
static void write_memory_start(void *sohandle,
struct sh_mobile_lcdc_sys_bus_ops *so)
{
write_reg(sohandle, so, 0, 0x2c);
}
static void clear_memory(void *sohandle,
struct sh_mobile_lcdc_sys_bus_ops *so)
{
int i;
/* write start */
write_memory_start(sohandle, so);
/* paint it black */
for (i = 0; i < (240 * 400); i++)
write_reg(sohandle, so, 1, 0x00);
}
static void display_on(void *sohandle,
struct sh_mobile_lcdc_sys_bus_ops *so)
{
/* access protect off */
write_reg(sohandle, so, 0, 0xb0);
write_reg(sohandle, so, 1, 0x00);
/* exit deep standby mode */
write_reg(sohandle, so, 0, 0xb1);
write_reg(sohandle, so, 1, 0x00);
/* frame memory I/F */
write_reg(sohandle, so, 0, 0xb3);
write_data(sohandle, so, data_frame_if, ARRAY_SIZE(data_frame_if));
/* display mode and frame memory write mode */
write_reg(sohandle, so, 0, 0xb4);
write_reg(sohandle, so, 1, 0x00); /* DBI, internal clock */
/* panel */
write_reg(sohandle, so, 0, 0xc0);
write_data(sohandle, so, data_panel, ARRAY_SIZE(data_panel));
/* timing (normal) */
write_reg(sohandle, so, 0, 0xc1);
write_data(sohandle, so, data_timing, ARRAY_SIZE(data_timing));
/* timing (partial) */
write_reg(sohandle, so, 0, 0xc2);
write_data(sohandle, so, data_timing, ARRAY_SIZE(data_timing));
/* timing (idle) */
write_reg(sohandle, so, 0, 0xc3);
write_data(sohandle, so, data_timing, ARRAY_SIZE(data_timing));
/* timing (source/VCOM/gate driving) */
write_reg(sohandle, so, 0, 0xc4);
write_data(sohandle, so, data_timing_src, ARRAY_SIZE(data_timing_src));
/* gamma (red) */
write_reg(sohandle, so, 0, 0xc8);
write_data(sohandle, so, data_gamma, ARRAY_SIZE(data_gamma));
/* gamma (green) */
write_reg(sohandle, so, 0, 0xc9);
write_data(sohandle, so, data_gamma, ARRAY_SIZE(data_gamma));
/* gamma (blue) */
write_reg(sohandle, so, 0, 0xca);
write_data(sohandle, so, data_gamma, ARRAY_SIZE(data_gamma));
/* power (common) */
write_reg(sohandle, so, 0, 0xd0);
write_data(sohandle, so, data_power, ARRAY_SIZE(data_power));
/* VCOM */
write_reg(sohandle, so, 0, 0xd1);
write_reg(sohandle, so, 1, 0x00);
write_reg(sohandle, so, 1, 0x0f);
write_reg(sohandle, so, 1, 0x02);
/* power (normal) */
write_reg(sohandle, so, 0, 0xd2);
write_reg(sohandle, so, 1, 0x63);
write_reg(sohandle, so, 1, 0x24);
/* power (partial) */
write_reg(sohandle, so, 0, 0xd3);
write_reg(sohandle, so, 1, 0x63);
write_reg(sohandle, so, 1, 0x24);
/* power (idle) */
write_reg(sohandle, so, 0, 0xd4);
write_reg(sohandle, so, 1, 0x63);
write_reg(sohandle, so, 1, 0x24);
write_reg(sohandle, so, 0, 0xd8);
write_reg(sohandle, so, 1, 0x77);
write_reg(sohandle, so, 1, 0x77);
/* TE signal */
write_reg(sohandle, so, 0, 0x35);
write_reg(sohandle, so, 1, 0x00);
/* TE signal line */
write_reg(sohandle, so, 0, 0x44);
write_reg(sohandle, so, 1, 0x00);
write_reg(sohandle, so, 1, 0x00);
/* column address */
write_reg(sohandle, so, 0, 0x2a);
write_reg(sohandle, so, 1, 0x00);
write_reg(sohandle, so, 1, 0x00);
write_reg(sohandle, so, 1, 0x00);
write_reg(sohandle, so, 1, 0xef);
/* page address */
write_reg(sohandle, so, 0, 0x2b);
write_reg(sohandle, so, 1, 0x00);
write_reg(sohandle, so, 1, 0x00);
write_reg(sohandle, so, 1, 0x01);
write_reg(sohandle, so, 1, 0x8f);
/* exit sleep mode */
write_reg(sohandle, so, 0, 0x11);
mdelay(120);
/* clear vram */
clear_memory(sohandle, so);
/* display ON */
write_reg(sohandle, so, 0, 0x29);
mdelay(1);
write_memory_start(sohandle, so);
}
int kfr2r09_lcd_setup(void *board_data, void *sohandle,
struct sh_mobile_lcdc_sys_bus_ops *so)
{
/* power on */
gpio_set_value(GPIO_PTF4, 0); /* PROTECT/ -> L */
gpio_set_value(GPIO_PTE4, 0); /* LCD_RST/ -> L */
gpio_set_value(GPIO_PTF4, 1); /* PROTECT/ -> H */
udelay(1100);
gpio_set_value(GPIO_PTE4, 1); /* LCD_RST/ -> H */
udelay(10);
gpio_set_value(GPIO_PTF4, 0); /* PROTECT/ -> L */
mdelay(20);
if (read_device_code(sohandle, so) != 0x01221517)
return -ENODEV;
pr_info("KFR2R09 WQVGA LCD Module detected.\n");
display_on(sohandle, so);
return 0;
}
#define CTRL_CKSW 0x10
#define CTRL_C10 0x20
#define CTRL_CPSW 0x80
#define MAIN_MLED4 0x40
#define MAIN_MSW 0x80
static int kfr2r09_lcd_backlight(int on)
{
struct i2c_adapter *a;
struct i2c_msg msg;
unsigned char buf[2];
int ret;
a = i2c_get_adapter(0);
if (!a)
return -ENODEV;
buf[0] = 0x00;
if (on)
buf[1] = CTRL_CPSW | CTRL_C10 | CTRL_CKSW;
else
buf[1] = 0;
msg.addr = 0x75;
msg.buf = buf;
msg.len = 2;
msg.flags = 0;
ret = i2c_transfer(a, &msg, 1);
if (ret != 1)
return -ENODEV;
buf[0] = 0x01;
if (on)
buf[1] = MAIN_MSW | MAIN_MLED4 | 0x0c;
else
buf[1] = 0;
msg.addr = 0x75;
msg.buf = buf;
msg.len = 2;
msg.flags = 0;
ret = i2c_transfer(a, &msg, 1);
if (ret != 1)
return -ENODEV;
return 0;
}
void kfr2r09_lcd_on(void *board_data)
{
kfr2r09_lcd_backlight(1);
}
void kfr2r09_lcd_off(void *board_data)
{
kfr2r09_lcd_backlight(0);
}
arch/sh/boards/mach-kfr2r09/setup.c 0 → 100644
View file @ 0858d9c0
/*
* KFR2R09 board support code
*
* Copyright (C) 2009 Magnus Damm
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/interrupt.h>
#include <linux/mtd/physmap.h>
#include <linux/mtd/onenand.h>
#include <linux/delay.h>
#include <linux/clk.h>
#include <linux/gpio.h>
#include <linux/input.h>
#include <video/sh_mobile_lcdc.h>
#include <asm/clock.h>
#include <asm/machvec.h>
#include <asm/io.h>
#include <asm/sh_keysc.h>
#include <cpu/sh7724.h>
#include <mach/kfr2r09.h>
static struct mtd_partition kfr2r09_nor_flash_partitions[] =
{
{
.name = "boot",
.offset = 0,
.size = (4 * 1024 * 1024),
.mask_flags = MTD_WRITEABLE, /* Read-only */
},
{
.name = "other",
.offset = MTDPART_OFS_APPEND,
.size = MTDPART_SIZ_FULL,
},
};
static struct physmap_flash_data kfr2r09_nor_flash_data = {
.width = 2,
.parts = kfr2r09_nor_flash_partitions,
.nr_parts = ARRAY_SIZE(kfr2r09_nor_flash_partitions),
};
static struct resource kfr2r09_nor_flash_resources[] = {
[0] = {
.name = "NOR Flash",
.start = 0x00000000,
.end = 0x03ffffff,
.flags = IORESOURCE_MEM,
}
};
static struct platform_device kfr2r09_nor_flash_device = {
.name = "physmap-flash",
.resource = kfr2r09_nor_flash_resources,
.num_resources = ARRAY_SIZE(kfr2r09_nor_flash_resources),
.dev = {
.platform_data = &kfr2r09_nor_flash_data,
},
};
static struct resource kfr2r09_nand_flash_resources[] = {
[0] = {
.name = "NAND Flash",
.start = 0x10000000,
.end = 0x1001ffff,
.flags = IORESOURCE_MEM,
}
};
static struct platform_device kfr2r09_nand_flash_device = {
.name = "onenand-flash",
.resource = kfr2r09_nand_flash_resources,
.num_resources = ARRAY_SIZE(kfr2r09_nand_flash_resources),
};
static struct sh_keysc_info kfr2r09_sh_keysc_info = {
.mode = SH_KEYSC_MODE_1, /* KEYOUT0->4, KEYIN0->4 */
.scan_timing = 3,
.delay = 10,
.keycodes = {
KEY_PHONE, KEY_CLEAR, KEY_MAIL, KEY_WWW, KEY_ENTER,
KEY_1, KEY_2, KEY_3, 0, KEY_UP,
KEY_4, KEY_5, KEY_6, 0, KEY_LEFT,
KEY_7, KEY_8, KEY_9, KEY_PROG1, KEY_RIGHT,
KEY_S, KEY_0, KEY_P, KEY_PROG2, KEY_DOWN,
0, 0, 0, 0, 0
},
};
static struct resource kfr2r09_sh_keysc_resources[] = {
[0] = {
.name = "KEYSC",
.start = 0x044b0000,
.end = 0x044b000f,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = 79,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device kfr2r09_sh_keysc_device = {
.name = "sh_keysc",
.id = 0, /* "keysc0" clock */
.num_resources = ARRAY_SIZE(kfr2r09_sh_keysc_resources),
.resource = kfr2r09_sh_keysc_resources,
.dev = {
.platform_data = &kfr2r09_sh_keysc_info,
},
.archdata = {
.hwblk_id = HWBLK_KEYSC,
},
};
static struct sh_mobile_lcdc_info kfr2r09_sh_lcdc_info = {
.clock_source = LCDC_CLK_BUS,
.ch[0] = {
.chan = LCDC_CHAN_MAINLCD,
.bpp = 16,
.interface_type = SYS18,
.clock_divider = 6,
.flags = LCDC_FLAGS_DWPOL,
.lcd_cfg = {
.name = "TX07D34VM0AAA",
.xres = 240,
.yres = 400,
.left_margin = 0,
.right_margin = 16,
.hsync_len = 8,
.upper_margin = 0,
.lower_margin = 1,
.vsync_len = 1,
.sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
},
.lcd_size_cfg = {
.width = 35,
.height = 58,
},
.board_cfg = {
.setup_sys = kfr2r09_lcd_setup,
.display_on = kfr2r09_lcd_on,
.display_off = kfr2r09_lcd_off,
},
.sys_bus_cfg = {
.ldmt2r = 0x07010904,
.ldmt3r = 0x14012914,
/* set 1s delay to encourage fsync() */
.deferred_io_msec = 1000,
},
}
};
static struct resource kfr2r09_sh_lcdc_resources[] = {
[0] = {
.name = "LCDC",
.start = 0xfe940000, /* P4-only space */
.end = 0xfe941fff,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = 106,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device kfr2r09_sh_lcdc_device = {
.name = "sh_mobile_lcdc_fb",
.num_resources = ARRAY_SIZE(kfr2r09_sh_lcdc_resources),
.resource = kfr2r09_sh_lcdc_resources,
.dev = {
.platform_data = &kfr2r09_sh_lcdc_info,
},
.archdata = {
.hwblk_id = HWBLK_LCDC,
},
};
static struct platform_device *kfr2r09_devices[] __initdata = {
&kfr2r09_nor_flash_device,
&kfr2r09_nand_flash_device,
&kfr2r09_sh_keysc_device,
&kfr2r09_sh_lcdc_device,
};
#define BSC_CS0BCR 0xfec10004
#define BSC_CS0WCR 0xfec10024
#define BSC_CS4BCR 0xfec10010
#define BSC_CS4WCR 0xfec10030
static int __init kfr2r09_devices_setup(void)
{
/* enable SCIF1 serial port for YC401 console support */
gpio_request(GPIO_FN_SCIF1_RXD, NULL);
gpio_request(GPIO_FN_SCIF1_TXD, NULL);
/* setup NOR flash at CS0 */
ctrl_outl(0x36db0400, BSC_CS0BCR);
ctrl_outl(0x00000500, BSC_CS0WCR);
/* setup NAND flash at CS4 */
ctrl_outl(0x36db0400, BSC_CS4BCR);
ctrl_outl(0x00000500, BSC_CS4WCR);
/* setup KEYSC pins */
gpio_request(GPIO_FN_KEYOUT0, NULL);
gpio_request(GPIO_FN_KEYOUT1, NULL);
gpio_request(GPIO_FN_KEYOUT2, NULL);
gpio_request(GPIO_FN_KEYOUT3, NULL);
gpio_request(GPIO_FN_KEYOUT4_IN6, NULL);
gpio_request(GPIO_FN_KEYIN0, NULL);
gpio_request(GPIO_FN_KEYIN1, NULL);
gpio_request(GPIO_FN_KEYIN2, NULL);
gpio_request(GPIO_FN_KEYIN3, NULL);
gpio_request(GPIO_FN_KEYIN4, NULL);
gpio_request(GPIO_FN_KEYOUT5_IN5, NULL);
/* setup LCDC pins for SYS panel */
gpio_request(GPIO_FN_LCDD17, NULL);
gpio_request(GPIO_FN_LCDD16, NULL);
gpio_request(GPIO_FN_LCDD15, NULL);
gpio_request(GPIO_FN_LCDD14, NULL);
gpio_request(GPIO_FN_LCDD13, NULL);
gpio_request(GPIO_FN_LCDD12, NULL);
gpio_request(GPIO_FN_LCDD11, NULL);
gpio_request(GPIO_FN_LCDD10, NULL);
gpio_request(GPIO_FN_LCDD9, NULL);
gpio_request(GPIO_FN_LCDD8, NULL);
gpio_request(GPIO_FN_LCDD7, NULL);
gpio_request(GPIO_FN_LCDD6, NULL);
gpio_request(GPIO_FN_LCDD5, NULL);
gpio_request(GPIO_FN_LCDD4, NULL);
gpio_request(GPIO_FN_LCDD3, NULL);
gpio_request(GPIO_FN_LCDD2, NULL);
gpio_request(GPIO_FN_LCDD1, NULL);
gpio_request(GPIO_FN_LCDD0, NULL);
gpio_request(GPIO_FN_LCDRS, NULL); /* LCD_RS */
gpio_request(GPIO_FN_LCDCS, NULL); /* LCD_CS/ */
gpio_request(GPIO_FN_LCDRD, NULL); /* LCD_RD/ */
gpio_request(GPIO_FN_LCDWR, NULL); /* LCD_WR/ */
gpio_request(GPIO_FN_LCDVSYN, NULL); /* LCD_VSYNC */
gpio_request(GPIO_PTE4, NULL); /* LCD_RST/ */
gpio_direction_output(GPIO_PTE4, 1);
gpio_request(GPIO_PTF4, NULL); /* PROTECT/ */
gpio_direction_output(GPIO_PTF4, 1);
gpio_request(GPIO_PTU0, NULL); /* LEDSTDBY/ */
gpio_direction_output(GPIO_PTU0, 1);
return platform_add_devices(kfr2r09_devices,
ARRAY_SIZE(kfr2r09_devices));
}
device_initcall(kfr2r09_devices_setup);
/* Return the board specific boot mode pin configuration */
static int kfr2r09_mode_pins(void)
{
/* MD0=1, MD1=1, MD2=0: Clock Mode 3
* MD3=0: 16-bit Area0 Bus Width
* MD5=1: Little Endian
* MD8=1: Test Mode Disabled
*/
return MODE_PIN0 | MODE_PIN1 | MODE_PIN5 | MODE_PIN8;
}
/*
* The Machine Vector
*/
static struct sh_machine_vector mv_kfr2r09 __initmv = {
.mv_name = "kfr2r09",
.mv_mode_pins = kfr2r09_mode_pins,
};
arch/sh/boards/mach-migor/setup.c
View file @ 0858d9c0
......@@ -98,6 +98,9 @@ static struct platform_device sh_keysc_device = {
.dev = {
.platform_data = &sh_keysc_info,
},
.archdata = {
.hwblk_id = HWBLK_KEYSC,
},
};
static struct mtd_partition migor_nor_flash_partitions[] =
......@@ -292,6 +295,9 @@ static struct platform_device migor_lcdc_device = {
.dev = {
.platform_data = &sh_mobile_lcdc_info,
},
.archdata = {
.hwblk_id = HWBLK_LCDC,
},
};
static struct clk *camera_clk;
......@@ -379,6 +385,9 @@ static struct platform_device migor_ceu_device = {
.dev = {
.platform_data = &sh_mobile_ceu_info,
},
.archdata = {
.hwblk_id = HWBLK_CEU,
},
};
struct spi_gpio_platform_data sdcard_cn9_platform_data = {
......
arch/sh/boards/mach-se/7722/setup.c
View file @ 0858d9c0
......@@ -22,6 +22,7 @@
#include <asm/io.h>
#include <asm/heartbeat.h>
#include <asm/sh_keysc.h>
#include <cpu/sh7722.h>
/* Heartbeat */
static struct heartbeat_data heartbeat_data = {
......@@ -137,6 +138,9 @@ static struct platform_device sh_keysc_device = {
.dev = {
.platform_data = &sh_keysc_info,
},
.archdata = {
.hwblk_id = HWBLK_KEYSC,
},
};
static struct platform_device *se7722_devices[] __initdata = {
......
arch/sh/boards/mach-se/7724/setup.c
View file @ 0858d9c0
......@@ -39,7 +39,15 @@
* SW41 : abxx xxxx -> a = 0 : Analog monitor
* 1 : Digital monitor
* b = 0 : VGA
* 1 : SVGA
* 1 : 720p
*/
/*
* about 720p
*
* When you use 1280 x 720 lcdc output,
* you should change OSC6 lcdc clock from 25.175MHz to 74.25MHz,
* and change SW41 to use 720p
*/
/* Heartbeat */
......@@ -174,6 +182,9 @@ static struct platform_device lcdc_device = {
.dev = {
.platform_data = &lcdc_info,
},
.archdata = {
.hwblk_id = HWBLK_LCDC,
},
};
/* CEU0 */
......@@ -205,6 +216,9 @@ static struct platform_device ceu0_device = {
.dev = {
.platform_data = &sh_mobile_ceu0_info,
},
.archdata = {
.hwblk_id = HWBLK_CEU0,
},
};
/* CEU1 */
......@@ -236,6 +250,9 @@ static struct platform_device ceu1_device = {
.dev = {
.platform_data = &sh_mobile_ceu1_info,
},
.archdata = {
.hwblk_id = HWBLK_CEU1,
},
};
/* KEYSC in SoC (Needs SW33-2 set to ON) */
......@@ -274,6 +291,9 @@ static struct platform_device keysc_device = {
.dev = {
.platform_data = &keysc_info,
},
.archdata = {
.hwblk_id = HWBLK_KEYSC,
},
};
/* SH Eth */
......@@ -302,9 +322,13 @@ static struct platform_device sh_eth_device = {
},
.num_resources = ARRAY_SIZE(sh_eth_resources),
.resource = sh_eth_resources,
.archdata = {
.hwblk_id = HWBLK_ETHER,
},
};
static struct r8a66597_platdata sh7724_usb0_host_data = {
.on_chip = 1,
};
static struct resource sh7724_usb0_host_resources[] = {
......@@ -330,6 +354,9 @@ static struct platform_device sh7724_usb0_host_device = {
},
.num_resources = ARRAY_SIZE(sh7724_usb0_host_resources),
.resource = sh7724_usb0_host_resources,
.archdata = {
.hwblk_id = HWBLK_USB0,
},
};
static struct platform_device *ms7724se_devices[] __initdata = {
......@@ -421,6 +448,32 @@ static int __init devices_setup(void)
/* turn on USB clocks, use external clock */
ctrl_outw((ctrl_inw(PORT_MSELCRB) & ~0xc000) | 0x8000, PORT_MSELCRB);
#ifdef CONFIG_PM
/* Let LED9 show STATUS2 */
gpio_request(GPIO_FN_STATUS2, NULL);
/* Lit LED10 show STATUS0 */
gpio_request(GPIO_FN_STATUS0, NULL);
/* Lit LED11 show PDSTATUS */
gpio_request(GPIO_FN_PDSTATUS, NULL);
#else
/* Lit LED9 */
gpio_request(GPIO_PTJ6, NULL);
gpio_direction_output(GPIO_PTJ6, 1);
gpio_export(GPIO_PTJ6, 0);
/* Lit LED10 */
gpio_request(GPIO_PTJ5, NULL);
gpio_direction_output(GPIO_PTJ5, 1);
gpio_export(GPIO_PTJ5, 0);
/* Lit LED11 */
gpio_request(GPIO_PTJ7, NULL);
gpio_direction_output(GPIO_PTJ7, 1);
gpio_export(GPIO_PTJ7, 0);
#endif
/* enable USB0 port */
ctrl_outw(0x0600, 0xa40501d4);
......@@ -546,15 +599,15 @@ static int __init devices_setup(void)
sh_eth_init();
if (sw & SW41_B) {
/* SVGA */
lcdc_info.ch[0].lcd_cfg.xres = 800;
lcdc_info.ch[0].lcd_cfg.yres = 600;
lcdc_info.ch[0].lcd_cfg.left_margin = 142;
lcdc_info.ch[0].lcd_cfg.right_margin = 52;
lcdc_info.ch[0].lcd_cfg.hsync_len = 96;
lcdc_info.ch[0].lcd_cfg.upper_margin = 24;
lcdc_info.ch[0].lcd_cfg.lower_margin = 2;
lcdc_info.ch[0].lcd_cfg.vsync_len = 2;
/* 720p */
lcdc_info.ch[0].lcd_cfg.xres = 1280;
lcdc_info.ch[0].lcd_cfg.yres = 720;
lcdc_info.ch[0].lcd_cfg.left_margin = 220;
lcdc_info.ch[0].lcd_cfg.right_margin = 110;
lcdc_info.ch[0].lcd_cfg.hsync_len = 40;
lcdc_info.ch[0].lcd_cfg.upper_margin = 20;
lcdc_info.ch[0].lcd_cfg.lower_margin = 5;
lcdc_info.ch[0].lcd_cfg.vsync_len = 5;
} else {
/* VGA */
lcdc_info.ch[0].lcd_cfg.xres = 640;
......
arch/sh/boards/mach-x3proto/setup.c
View file @ 0858d9c0
......@@ -17,6 +17,7 @@
#include <linux/irq.h>
#include <linux/interrupt.h>
#include <linux/usb/r8a66597.h>
#include <linux/usb/m66592.h>
#include <asm/ilsel.h>
static struct resource heartbeat_resources[] = {
......@@ -89,6 +90,11 @@ static struct platform_device r8a66597_usb_host_device = {
.resource = r8a66597_usb_host_resources,
};
static struct m66592_platdata usbf_platdata = {
.xtal = M66592_PLATDATA_XTAL_24MHZ,
.vif = 1,
};
static struct resource m66592_usb_peripheral_resources[] = {
[0] = {
.name = "m66592_udc",
......@@ -109,6 +115,7 @@ static struct platform_device m66592_usb_peripheral_device = {
.dev = {
.dma_mask = NULL, /* don't use dma */
.coherent_dma_mask = 0xffffffff,
.platform_data = &usbf_platdata,
},
.num_resources = ARRAY_SIZE(m66592_usb_peripheral_resources),
.resource = m66592_usb_peripheral_resources,
......
arch/sh/boot/.gitignore
View file @ 0858d9c0
zImage
vmlinux.srec
uImage
uImage.srec
vmlinux*
uImage*
arch/sh/boot/Makefile
View file @ 0858d9c0
......@@ -20,8 +20,13 @@ CONFIG_BOOT_LINK_OFFSET ?= 0x00800000
CONFIG_ZERO_PAGE_OFFSET ?= 0x00001000
CONFIG_ENTRY_OFFSET ?= 0x00001000
targets := zImage vmlinux.srec uImage uImage.srec
subdir- := compressed
suffix-$(CONFIG_KERNEL_GZIP) := gz
suffix-$(CONFIG_KERNEL_BZIP2) := bz2
suffix-$(CONFIG_KERNEL_LZMA) := lzma
targets := zImage vmlinux.srec romImage uImage uImage.srec uImage.gz uImage.bz2 uImage.lzma
extra-y += vmlinux.bin vmlinux.bin.gz vmlinux.bin.bz2 vmlinux.bin.lzma
subdir- := compressed romimage
$(obj)/zImage: $(obj)/compressed/vmlinux FORCE
$(call if_changed,objcopy)
......@@ -30,6 +35,13 @@ $(obj)/zImage: $(obj)/compressed/vmlinux FORCE
$(obj)/compressed/vmlinux: FORCE
$(Q)$(MAKE) $(build)=$(obj)/compressed $@
$(obj)/romImage: $(obj)/romimage/vmlinux FORCE
$(call if_changed,objcopy)
@echo ' Kernel: $@ is ready'
$(obj)/romimage/vmlinux: $(obj)/zImage FORCE
$(Q)$(MAKE) $(build)=$(obj)/romimage $@
KERNEL_MEMORY := 0x00000000
ifeq ($(CONFIG_PMB_FIXED),y)
KERNEL_MEMORY := $(shell /bin/bash -c 'printf "0x%08x" \
......@@ -40,9 +52,6 @@ KERNEL_MEMORY := $(shell /bin/bash -c 'printf "0x%08x" \
$$[$(CONFIG_MEMORY_START)]')
endif
export CONFIG_PAGE_OFFSET CONFIG_MEMORY_START CONFIG_BOOT_LINK_OFFSET \
CONFIG_ZERO_PAGE_OFFSET CONFIG_ENTRY_OFFSET KERNEL_MEMORY
KERNEL_LOAD := $(shell /bin/bash -c 'printf "0x%08x" \
$$[$(CONFIG_PAGE_OFFSET) + \
$(KERNEL_MEMORY) + \
......@@ -55,19 +64,30 @@ KERNEL_ENTRY := $(shell /bin/bash -c 'printf "0x%08x" \
quiet_cmd_uimage = UIMAGE $@
cmd_uimage = $(CONFIG_SHELL) $(MKIMAGE) -A sh -O linux -T kernel \
-C gzip -a $(KERNEL_LOAD) -e $(KERNEL_ENTRY) \
-C $(2) -a $(KERNEL_LOAD) -e $(KERNEL_ENTRY) \
-n 'Linux-$(KERNELRELEASE)' -d $< $@
$(obj)/uImage: $(obj)/vmlinux.bin.gz FORCE
$(call if_changed,uimage)
@echo ' Image $@ is ready'
$(obj)/vmlinux.bin: vmlinux FORCE
$(call if_changed,objcopy)
$(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin FORCE
$(call if_changed,gzip)
$(obj)/vmlinux.bin.bz2: $(obj)/vmlinux.bin FORCE
$(call if_changed,bzip2)
$(obj)/vmlinux.bin.lzma: $(obj)/vmlinux.bin FORCE
$(call if_changed,lzma)
$(obj)/uImage.bz2: $(obj)/vmlinux.bin.bz2
$(call if_changed,uimage,bzip2)
$(obj)/uImage.gz: $(obj)/vmlinux.bin.gz
$(call if_changed,uimage,gzip)
$(obj)/uImage.lzma: $(obj)/vmlinux.bin.lzma
$(call if_changed,uimage,lzma)
OBJCOPYFLAGS_vmlinux.srec := -I binary -O srec
$(obj)/vmlinux.srec: $(obj)/compressed/vmlinux
$(call if_changed,objcopy)
......@@ -76,5 +96,9 @@ OBJCOPYFLAGS_uImage.srec := -I binary -O srec
$(obj)/uImage.srec: $(obj)/uImage
$(call if_changed,objcopy)
clean-files += uImage uImage.srec vmlinux.srec \
vmlinux.bin vmlinux.bin.gz
$(obj)/uImage: $(obj)/uImage.$(suffix-y)
@ln -sf $(notdir $<) $@
@echo ' Image $@ is ready'
export CONFIG_PAGE_OFFSET CONFIG_MEMORY_START CONFIG_BOOT_LINK_OFFSET \
CONFIG_ZERO_PAGE_OFFSET CONFIG_ENTRY_OFFSET KERNEL_MEMORY suffix-y
arch/sh/boot/compressed/Makefile
View file @ 0858d9c0
......@@ -5,9 +5,10 @@
#
targets := vmlinux vmlinux.bin vmlinux.bin.gz \
head_$(BITS).o misc_$(BITS).o piggy.o
vmlinux.bin.bz2 vmlinux.bin.lzma \
head_$(BITS).o misc.o piggy.o
OBJECTS = $(obj)/head_$(BITS).o $(obj)/misc_$(BITS).o $(obj)/cache.o
OBJECTS = $(obj)/head_$(BITS).o $(obj)/misc.o $(obj)/cache.o
ifdef CONFIG_SH_STANDARD_BIOS
OBJECTS += $(obj)/../../kernel/sh_bios.o
......@@ -23,7 +24,7 @@ IMAGE_OFFSET := $(shell /bin/bash -c 'printf "0x%08x" \
LIBGCC := $(shell $(CC) $(KBUILD_CFLAGS) -print-libgcc-file-name)
ifeq ($(CONFIG_FUNCTION_TRACER),y)
ifeq ($(CONFIG_MCOUNT),y)
ORIG_CFLAGS := $(KBUILD_CFLAGS)
KBUILD_CFLAGS = $(subst -pg, , $(ORIG_CFLAGS))
endif
......@@ -38,10 +39,18 @@ $(obj)/vmlinux: $(OBJECTS) $(obj)/piggy.o $(LIBGCC) FORCE
$(obj)/vmlinux.bin: vmlinux FORCE
$(call if_changed,objcopy)
$(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin FORCE
vmlinux.bin.all-y := $(obj)/vmlinux.bin
$(obj)/vmlinux.bin.gz: $(vmlinux.bin.all-y) FORCE
$(call if_changed,gzip)
$(obj)/vmlinux.bin.bz2: $(vmlinux.bin.all-y) FORCE
$(call if_changed,bzip2)
$(obj)/vmlinux.bin.lzma: $(vmlinux.bin.all-y) FORCE
$(call if_changed,lzma)
OBJCOPYFLAGS += -R .empty_zero_page
$(obj)/piggy.o: $(obj)/piggy.S $(obj)/vmlinux.bin.gz FORCE
$(call if_changed,as_o_S)
LDFLAGS_piggy.o := -r --format binary --oformat $(ld-bfd) -T
$(obj)/piggy.o: $(obj)/vmlinux.scr $(obj)/vmlinux.bin.$(suffix-y) FORCE
$(call if_changed,ld)
arch/sh/boot/compressed/misc_32.c → arch/sh/boot/compressed/misc.c
View file @ 0858d9c0
......@@ -14,73 +14,26 @@
#include <asm/uaccess.h>
#include <asm/addrspace.h>
#include <asm/page.h>
#ifdef CONFIG_SH_STANDARD_BIOS
#include <asm/sh_bios.h>
#endif
/*
* gzip declarations
*/
#define OF(args) args
#define STATIC static
#undef memset
#undef memcpy
#define memzero(s, n) memset ((s), 0, (n))
typedef unsigned char uch;
typedef unsigned short ush;
typedef unsigned long ulg;
#define WSIZE 0x8000 /* Window size must be at least 32k, */
/* and a power of two */
static uch *inbuf; /* input buffer */
static uch window[WSIZE]; /* Sliding window buffer */
static unsigned insize = 0; /* valid bytes in inbuf */
static unsigned inptr = 0; /* index of next byte to be processed in inbuf */
static unsigned outcnt = 0; /* bytes in output buffer */
/* gzip flag byte */
#define ASCII_FLAG 0x01 /* bit 0 set: file probably ASCII text */
#define CONTINUATION 0x02 /* bit 1 set: continuation of multi-part gzip file */
#define EXTRA_FIELD 0x04 /* bit 2 set: extra field present */
#define ORIG_NAME 0x08 /* bit 3 set: original file name present */
#define COMMENT 0x10 /* bit 4 set: file comment present */
#define ENCRYPTED 0x20 /* bit 5 set: file is encrypted */
#define RESERVED 0xC0 /* bit 6,7: reserved */
#define get_byte() (inptr < insize ? inbuf[inptr++] : fill_inbuf())
/* Diagnostic functions */
#ifdef DEBUG
# define Assert(cond,msg) {if(!(cond)) error(msg);}
# define Trace(x) fprintf x
# define Tracev(x) {if (verbose) fprintf x ;}
# define Tracevv(x) {if (verbose>1) fprintf x ;}
# define Tracec(c,x) {if (verbose && (c)) fprintf x ;}
# define Tracecv(c,x) {if (verbose>1 && (c)) fprintf x ;}
#else
# define Assert(cond,msg)
# define Trace(x)
# define Tracev(x)
# define Tracevv(x)
# define Tracec(c,x)
# define Tracecv(c,x)
#endif
static int fill_inbuf(void);
static void flush_window(void);
static void error(char *m);
/* cache.c */
#define CACHE_ENABLE 0
#define CACHE_DISABLE 1
int cache_control(unsigned int command);
extern char input_data[];
extern int input_len;
static long bytes_out = 0;
static uch *output_data;
static unsigned long output_ptr = 0;
static unsigned char *output;
static void error(char *m);
......@@ -91,9 +44,23 @@ extern int _end;
static unsigned long free_mem_ptr;
static unsigned long free_mem_end_ptr;
#define HEAP_SIZE 0x10000
#ifdef CONFIG_HAVE_KERNEL_BZIP2
#define HEAP_SIZE 0x400000
#else
#define HEAP_SIZE 0x10000
#endif
#ifdef CONFIG_KERNEL_GZIP
#include "../../../../lib/decompress_inflate.c"
#endif
#include "../../../../lib/inflate.c"
#ifdef CONFIG_KERNEL_BZIP2
#include "../../../../lib/decompress_bunzip2.c"
#endif
#ifdef CONFIG_KERNEL_LZMA
#include "../../../../lib/decompress_unlzma.c"
#endif
#ifdef CONFIG_SH_STANDARD_BIOS
size_t strlen(const char *s)
......@@ -138,44 +105,6 @@ void* memcpy(void* __dest, __const void* __src,
return __dest;
}
/* ===========================================================================
* Fill the input buffer. This is called only when the buffer is empty
* and at least one byte is really needed.
*/
static int fill_inbuf(void)
{
if (insize != 0) {
error("ran out of input data");
}
inbuf = input_data;
insize = input_len;
inptr = 1;
return inbuf[0];
}
/* ===========================================================================
* Write the output window window[0..outcnt-1] and update crc and bytes_out.
* (Used for the decompressed data only.)
*/
static void flush_window(void)
{
ulg c = crc; /* temporary variable */
unsigned n;
uch *in, *out, ch;
in = window;
out = &output_data[output_ptr];
for (n = 0; n < outcnt; n++) {
ch = *out++ = *in++;
c = crc_32_tab[((int)c ^ ch) & 0xff] ^ (c >> 8);
}
crc = c;
bytes_out += (ulg)outcnt;
output_ptr += (ulg)outcnt;
outcnt = 0;
}
static void error(char *x)
{
puts("\n\n");
......@@ -185,22 +114,36 @@ static void error(char *x)
while(1); /* Halt */
}
#ifdef CONFIG_SUPERH64
#define stackalign 8
#else
#define stackalign 4
#endif
#define STACK_SIZE (4096)
long user_stack [STACK_SIZE];
long* stack_start = &user_stack[STACK_SIZE];
long __attribute__ ((aligned(stackalign))) user_stack[STACK_SIZE];
long *stack_start = &user_stack[STACK_SIZE];
void decompress_kernel(void)
{
output_data = NULL;
output_ptr = PHYSADDR((unsigned long)&_text+PAGE_SIZE);
unsigned long output_addr;
#ifdef CONFIG_SUPERH64
output_addr = (CONFIG_MEMORY_START + 0x2000);
#else
output_addr = PHYSADDR((unsigned long)&_text+PAGE_SIZE);
#ifdef CONFIG_29BIT
output_ptr |= P2SEG;
output_addr |= P2SEG;
#endif
#endif
output = (unsigned char *)output_addr;
free_mem_ptr = (unsigned long)&_end;
free_mem_end_ptr = free_mem_ptr + HEAP_SIZE;
makecrc();
puts("Uncompressing Linux... ");
gunzip();
cache_control(CACHE_ENABLE);
decompress(input_data, input_len, NULL, NULL, output, NULL, error);
cache_control(CACHE_DISABLE);
puts("Ok, booting the kernel.\n");
}
arch/sh/boot/compressed/misc_64.c deleted 100644 → 0
View file @ 9d730229
/*
* arch/sh/boot/compressed/misc_64.c
*
* This is a collection of several routines from gzip-1.0.3
* adapted for Linux.
*
* malloc by Hannu Savolainen 1993 and Matthias Urlichs 1994
*
* Adapted for SHmedia from sh by Stuart Menefy, May 2002
*/
#include <asm/uaccess.h>
/* cache.c */
#define CACHE_ENABLE 0
#define CACHE_DISABLE 1
int cache_control(unsigned int command);
/*
* gzip declarations
*/
#define OF(args) args
#define STATIC static
#undef memset
#undef memcpy
#define memzero(s, n) memset ((s), 0, (n))
typedef unsigned char uch;
typedef unsigned short ush;
typedef unsigned long ulg;
#define WSIZE 0x8000 /* Window size must be at least 32k, */
/* and a power of two */
static uch *inbuf; /* input buffer */
static uch window[WSIZE]; /* Sliding window buffer */
static unsigned insize = 0; /* valid bytes in inbuf */
static unsigned inptr = 0; /* index of next byte to be processed in inbuf */
static unsigned outcnt = 0; /* bytes in output buffer */
/* gzip flag byte */
#define ASCII_FLAG 0x01 /* bit 0 set: file probably ASCII text */
#define CONTINUATION 0x02 /* bit 1 set: continuation of multi-part gzip file */
#define EXTRA_FIELD 0x04 /* bit 2 set: extra field present */
#define ORIG_NAME 0x08 /* bit 3 set: original file name present */
#define COMMENT 0x10 /* bit 4 set: file comment present */
#define ENCRYPTED 0x20 /* bit 5 set: file is encrypted */
#define RESERVED 0xC0 /* bit 6,7: reserved */
#define get_byte() (inptr < insize ? inbuf[inptr++] : fill_inbuf())
/* Diagnostic functions */
#ifdef DEBUG
# define Assert(cond,msg) {if(!(cond)) error(msg);}
# define Trace(x) fprintf x
# define Tracev(x) {if (verbose) fprintf x ;}
# define Tracevv(x) {if (verbose>1) fprintf x ;}
# define Tracec(c,x) {if (verbose && (c)) fprintf x ;}
# define Tracecv(c,x) {if (verbose>1 && (c)) fprintf x ;}
#else
# define Assert(cond,msg)
# define Trace(x)
# define Tracev(x)
# define Tracevv(x)
# define Tracec(c,x)
# define Tracecv(c,x)
#endif
static int fill_inbuf(void);
static void flush_window(void);
static void error(char *m);
extern char input_data[];
extern int input_len;
static long bytes_out = 0;
static uch *output_data;
static unsigned long output_ptr = 0;
static void error(char *m);
static void puts(const char *);
extern int _text; /* Defined in vmlinux.lds.S */
extern int _end;
static unsigned long free_mem_ptr;
static unsigned long free_mem_end_ptr;
#define HEAP_SIZE 0x10000
#include "../../../../lib/inflate.c"
void puts(const char *s)
{
}
void *memset(void *s, int c, size_t n)
{
int i;
char *ss = (char *) s;
for (i = 0; i < n; i++)
ss[i] = c;
return s;
}
void *memcpy(void *__dest, __const void *__src, size_t __n)
{
int i;
char *d = (char *) __dest, *s = (char *) __src;
for (i = 0; i < __n; i++)
d[i] = s[i];
return __dest;
}
/* ===========================================================================
* Fill the input buffer. This is called only when the buffer is empty
* and at least one byte is really needed.
*/
static int fill_inbuf(void)
{
if (insize != 0) {
error("ran out of input data\n");
}
inbuf = input_data;
insize = input_len;
inptr = 1;
return inbuf[0];
}
/* ===========================================================================
* Write the output window window[0..outcnt-1] and update crc and bytes_out.
* (Used for the decompressed data only.)
*/
static void flush_window(void)
{
ulg c = crc; /* temporary variable */
unsigned n;
uch *in, *out, ch;
in = window;
out = &output_data[output_ptr];
for (n = 0; n < outcnt; n++) {
ch = *out++ = *in++;
c = crc_32_tab[((int) c ^ ch) & 0xff] ^ (c >> 8);
}
crc = c;
bytes_out += (ulg) outcnt;
output_ptr += (ulg) outcnt;
outcnt = 0;
puts(".");
}
static void error(char *x)
{
puts("\n\n");
puts(x);
puts("\n\n -- System halted");
while (1) ; /* Halt */
}
#define STACK_SIZE (4096)
long __attribute__ ((aligned(8))) user_stack[STACK_SIZE];
long *stack_start = &user_stack[STACK_SIZE];
void decompress_kernel(void)
{
output_data = (uch *) (CONFIG_MEMORY_START + 0x2000);
free_mem_ptr = (unsigned long) &_end;
free_mem_end_ptr = free_mem_ptr + HEAP_SIZE;
makecrc();
puts("Uncompressing Linux... ");
cache_control(CACHE_ENABLE);
gunzip();
puts("\n");
#if 0
/* When booting from ROM may want to do something like this if the
* boot loader doesn't.
*/
/* Set up the parameters and command line */
{
volatile unsigned int *parambase =
(int *) (CONFIG_MEMORY_START + 0x1000);
parambase[0] = 0x1; /* MOUNT_ROOT_RDONLY */
parambase[1] = 0x0; /* RAMDISK_FLAGS */
parambase[2] = 0x0200; /* ORIG_ROOT_DEV */
parambase[3] = 0x0; /* LOADER_TYPE */
parambase[4] = 0x0; /* INITRD_START */
parambase[5] = 0x0; /* INITRD_SIZE */
parambase[6] = 0;
strcpy((char *) ((int) parambase + 0x100),
"console=ttySC0,38400");
}
#endif
puts("Ok, booting the kernel.\n");
cache_control(CACHE_DISABLE);
}
arch/sh/boot/compressed/piggy.S deleted 100644 → 0
View file @ 9d730229
.global input_len, input_data
.data
input_len:
.long input_data_end - input_data
input_data:
.incbin "arch/sh/boot/compressed/vmlinux.bin.gz"
input_data_end:
.end
arch/sh/boot/compressed/vmlinux.scr 0 → 100644
View file @ 0858d9c0
SECTIONS
{
.rodata.compressed : {
input_len = .;
LONG(input_data_end - input_data) input_data = .;
*(.data)
output_len = . - 4;
input_data_end = .;
}
}
arch/sh/boot/romimage/Makefile 0 → 100644
View file @ 0858d9c0
#
# linux/arch/sh/boot/romimage/Makefile
#
# create an image suitable for burning to flash from zImage
#
targets := vmlinux head.o
OBJECTS = $(obj)/head.o
LDFLAGS_vmlinux := --oformat $(ld-bfd) -Ttext 0 -e romstart
$(obj)/vmlinux: $(OBJECTS) $(obj)/piggy.o FORCE
$(call if_changed,ld)
@:
LDFLAGS_piggy.o := -r --format binary --oformat $(ld-bfd) -T
$(obj)/piggy.o: $(obj)/vmlinux.scr arch/sh/boot/zImage FORCE
$(call if_changed,ld)
arch/sh/boot/romimage/head.S 0 → 100644
View file @ 0858d9c0
/*
* linux/arch/sh/boot/romimage/head.S
*
* Board specific setup code, executed before zImage loader
*/
.text
.global romstart
romstart:
#include <mach/romimage.h>
arch/sh/boot/romimage/vmlinux.scr 0 → 100644
View file @ 0858d9c0
SECTIONS
{
.text : {
*(.data)
}
}
arch/sh/configs/kfr2r09_defconfig 0 → 100644
View file @ 0858d9c0
This diff is collapsed.
arch/sh/include/asm/device.h
View file @ 0858d9c0
......@@ -3,7 +3,9 @@
*
* This file is released under the GPLv2
*/
#include <asm-generic/device.h>
struct dev_archdata {
};
struct platform_device;
/* allocate contiguous memory chunk and fill in struct resource */
......@@ -12,3 +14,6 @@ int platform_resource_setup_memory(struct platform_device *pdev,
void plat_early_device_setup(void);
struct pdev_archdata {
int hwblk_id;
};
arch/sh/include/asm/dma-sh.h
View file @ 0858d9c0
......@@ -16,6 +16,7 @@
/* DMAOR contorl: The DMAOR access size is different by CPU.*/
#if defined(CONFIG_CPU_SUBTYPE_SH7723) || \
defined(CONFIG_CPU_SUBTYPE_SH7724) || \
defined(CONFIG_CPU_SUBTYPE_SH7780) || \
defined(CONFIG_CPU_SUBTYPE_SH7785)
#define dmaor_read_reg(n) \
......
arch/sh/include/asm/dwarf.h 0 → 100644
View file @ 0858d9c0
/*
* Copyright (C) 2009 Matt Fleming <matt@console-pimps.org>
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
*/
#ifndef __ASM_SH_DWARF_H
#define __ASM_SH_DWARF_H
#ifdef CONFIG_DWARF_UNWINDER
/*
* DWARF expression operations
*/
#define DW_OP_addr 0x03
#define DW_OP_deref 0x06
#define DW_OP_const1u 0x08
#define DW_OP_const1s 0x09
#define DW_OP_const2u 0x0a
#define DW_OP_const2s 0x0b
#define DW_OP_const4u 0x0c
#define DW_OP_const4s 0x0d
#define DW_OP_const8u 0x0e
#define DW_OP_const8s 0x0f
#define DW_OP_constu 0x10
#define DW_OP_consts 0x11
#define DW_OP_dup 0x12
#define DW_OP_drop 0x13
#define DW_OP_over 0x14
#define DW_OP_pick 0x15
#define DW_OP_swap 0x16
#define DW_OP_rot 0x17
#define DW_OP_xderef 0x18
#define DW_OP_abs 0x19
#define DW_OP_and 0x1a
#define DW_OP_div 0x1b
#define DW_OP_minus 0x1c
#define DW_OP_mod 0x1d
#define DW_OP_mul 0x1e
#define DW_OP_neg 0x1f
#define DW_OP_not 0x20
#define DW_OP_or 0x21
#define DW_OP_plus 0x22
#define DW_OP_plus_uconst 0x23
#define DW_OP_shl 0x24
#define DW_OP_shr 0x25
#define DW_OP_shra 0x26
#define DW_OP_xor 0x27
#define DW_OP_skip 0x2f
#define DW_OP_bra 0x28
#define DW_OP_eq 0x29
#define DW_OP_ge 0x2a
#define DW_OP_gt 0x2b
#define DW_OP_le 0x2c
#define DW_OP_lt 0x2d
#define DW_OP_ne 0x2e
#define DW_OP_lit0 0x30
#define DW_OP_lit1 0x31
#define DW_OP_lit2 0x32
#define DW_OP_lit3 0x33
#define DW_OP_lit4 0x34
#define DW_OP_lit5 0x35
#define DW_OP_lit6 0x36
#define DW_OP_lit7 0x37
#define DW_OP_lit8 0x38
#define DW_OP_lit9 0x39
#define DW_OP_lit10 0x3a
#define DW_OP_lit11 0x3b
#define DW_OP_lit12 0x3c
#define DW_OP_lit13 0x3d
#define DW_OP_lit14 0x3e
#define DW_OP_lit15 0x3f
#define DW_OP_lit16 0x40
#define DW_OP_lit17 0x41
#define DW_OP_lit18 0x42
#define DW_OP_lit19 0x43
#define DW_OP_lit20 0x44
#define DW_OP_lit21 0x45
#define DW_OP_lit22 0x46
#define DW_OP_lit23 0x47
#define DW_OP_lit24 0x48
#define DW_OP_lit25 0x49
#define DW_OP_lit26 0x4a
#define DW_OP_lit27 0x4b
#define DW_OP_lit28 0x4c
#define DW_OP_lit29 0x4d
#define DW_OP_lit30 0x4e
#define DW_OP_lit31 0x4f
#define DW_OP_reg0 0x50
#define DW_OP_reg1 0x51
#define DW_OP_reg2 0x52
#define DW_OP_reg3 0x53
#define DW_OP_reg4 0x54
#define DW_OP_reg5 0x55
#define DW_OP_reg6 0x56
#define DW_OP_reg7 0x57
#define DW_OP_reg8 0x58
#define DW_OP_reg9 0x59
#define DW_OP_reg10 0x5a
#define DW_OP_reg11 0x5b
#define DW_OP_reg12 0x5c
#define DW_OP_reg13 0x5d
#define DW_OP_reg14 0x5e
#define DW_OP_reg15 0x5f
#define DW_OP_reg16 0x60
#define DW_OP_reg17 0x61
#define DW_OP_reg18 0x62
#define DW_OP_reg19 0x63
#define DW_OP_reg20 0x64
#define DW_OP_reg21 0x65
#define DW_OP_reg22 0x66
#define DW_OP_reg23 0x67
#define DW_OP_reg24 0x68
#define DW_OP_reg25 0x69
#define DW_OP_reg26 0x6a
#define DW_OP_reg27 0x6b
#define DW_OP_reg28 0x6c
#define DW_OP_reg29 0x6d
#define DW_OP_reg30 0x6e
#define DW_OP_reg31 0x6f
#define DW_OP_breg0 0x70
#define DW_OP_breg1 0x71
#define DW_OP_breg2 0x72
#define DW_OP_breg3 0x73
#define DW_OP_breg4 0x74
#define DW_OP_breg5 0x75
#define DW_OP_breg6 0x76
#define DW_OP_breg7 0x77
#define DW_OP_breg8 0x78
#define DW_OP_breg9 0x79
#define DW_OP_breg10 0x7a
#define DW_OP_breg11 0x7b
#define DW_OP_breg12 0x7c
#define DW_OP_breg13 0x7d
#define DW_OP_breg14 0x7e
#define DW_OP_breg15 0x7f
#define DW_OP_breg16 0x80
#define DW_OP_breg17 0x81
#define DW_OP_breg18 0x82
#define DW_OP_breg19 0x83
#define DW_OP_breg20 0x84
#define DW_OP_breg21 0x85
#define DW_OP_breg22 0x86
#define DW_OP_breg23 0x87
#define DW_OP_breg24 0x88
#define DW_OP_breg25 0x89
#define DW_OP_breg26 0x8a
#define DW_OP_breg27 0x8b
#define DW_OP_breg28 0x8c
#define DW_OP_breg29 0x8d
#define DW_OP_breg30 0x8e
#define DW_OP_breg31 0x8f
#define DW_OP_regx 0x90
#define DW_OP_fbreg 0x91
#define DW_OP_bregx 0x92
#define DW_OP_piece 0x93
#define DW_OP_deref_size 0x94
#define DW_OP_xderef_size 0x95
#define DW_OP_nop 0x96
#define DW_OP_push_object_address 0x97
#define DW_OP_call2 0x98
#define DW_OP_call4 0x99
#define DW_OP_call_ref 0x9a
#define DW_OP_form_tls_address 0x9b
#define DW_OP_call_frame_cfa 0x9c
#define DW_OP_bit_piece 0x9d
#define DW_OP_lo_user 0xe0
#define DW_OP_hi_user 0xff
/*
* Addresses used in FDE entries in the .eh_frame section may be encoded
* using one of the following encodings.
*/
#define DW_EH_PE_absptr 0x00
#define DW_EH_PE_omit 0xff
#define DW_EH_PE_uleb128 0x01
#define DW_EH_PE_udata2 0x02
#define DW_EH_PE_udata4 0x03
#define DW_EH_PE_udata8 0x04
#define DW_EH_PE_sleb128 0x09
#define DW_EH_PE_sdata2 0x0a
#define DW_EH_PE_sdata4 0x0b
#define DW_EH_PE_sdata8 0x0c
#define DW_EH_PE_signed 0x09
#define DW_EH_PE_pcrel 0x10
/*
* The architecture-specific register number that contains the return
* address in the .debug_frame table.
*/
#define DWARF_ARCH_RA_REG 17
#ifndef __ASSEMBLY__
/*
* Read either the frame pointer (r14) or the stack pointer (r15).
* NOTE: this MUST be inlined.
*/
static __always_inline unsigned long dwarf_read_arch_reg(unsigned int reg)
{
unsigned long value;
switch (reg) {
case 14:
__asm__ __volatile__("mov r14, %0\n" : "=r" (value));
break;
case 15:
__asm__ __volatile__("mov r15, %0\n" : "=r" (value));
break;
default:
BUG();
}
return value;
}
/**
* dwarf_cie - Common Information Entry
*/
struct dwarf_cie {
unsigned long length;
unsigned long cie_id;
unsigned char version;
const char *augmentation;
unsigned int code_alignment_factor;
int data_alignment_factor;
/* Which column in the rule table represents return addr of func. */
unsigned int return_address_reg;
unsigned char *initial_instructions;
unsigned char *instructions_end;
unsigned char encoding;
unsigned long cie_pointer;
struct list_head link;
unsigned long flags;
#define DWARF_CIE_Z_AUGMENTATION (1 << 0)
};
/**
* dwarf_fde - Frame Description Entry
*/
struct dwarf_fde {
unsigned long length;
unsigned long cie_pointer;
struct dwarf_cie *cie;
unsigned long initial_location;
unsigned long address_range;
unsigned char *instructions;
unsigned char *end;
struct list_head link;
};
/**
* dwarf_frame - DWARF information for a frame in the call stack
*/
struct dwarf_frame {
struct dwarf_frame *prev, *next;
unsigned long pc;
struct dwarf_reg *regs;
unsigned int num_regs; /* how many regs are allocated? */
unsigned int depth; /* what level are we in the callstack? */
unsigned long cfa;
/* Valid when DW_FRAME_CFA_REG_OFFSET is set in flags */
unsigned int cfa_register;
unsigned int cfa_offset;
/* Valid when DW_FRAME_CFA_REG_EXP is set in flags */
unsigned char *cfa_expr;
unsigned int cfa_expr_len;
unsigned long flags;
#define DWARF_FRAME_CFA_REG_OFFSET (1 << 0)
#define DWARF_FRAME_CFA_REG_EXP (1 << 1)
unsigned long return_addr;
};
/**
* dwarf_reg - DWARF register
* @flags: Describes how to calculate the value of this register
*/
struct dwarf_reg {
unsigned long addr;
unsigned long flags;
#define DWARF_REG_OFFSET (1 << 0)
};
/**
* dwarf_stack - a DWARF stack contains a collection of DWARF frames
* @depth: the number of frames in the stack
* @level: an array of DWARF frames, indexed by stack level
*
*/
struct dwarf_stack {
unsigned int depth;
struct dwarf_frame **level;
};
/*
* Call Frame instruction opcodes.
*/
#define DW_CFA_advance_loc 0x40
#define DW_CFA_offset 0x80
#define DW_CFA_restore 0xc0
#define DW_CFA_nop 0x00
#define DW_CFA_set_loc 0x01
#define DW_CFA_advance_loc1 0x02
#define DW_CFA_advance_loc2 0x03
#define DW_CFA_advance_loc4 0x04
#define DW_CFA_offset_extended 0x05
#define DW_CFA_restore_extended 0x06
#define DW_CFA_undefined 0x07
#define DW_CFA_same_value 0x08
#define DW_CFA_register 0x09
#define DW_CFA_remember_state 0x0a
#define DW_CFA_restore_state 0x0b
#define DW_CFA_def_cfa 0x0c
#define DW_CFA_def_cfa_register 0x0d
#define DW_CFA_def_cfa_offset 0x0e
#define DW_CFA_def_cfa_expression 0x0f
#define DW_CFA_expression 0x10
#define DW_CFA_offset_extended_sf 0x11
#define DW_CFA_def_cfa_sf 0x12
#define DW_CFA_def_cfa_offset_sf 0x13
#define DW_CFA_val_offset 0x14
#define DW_CFA_val_offset_sf 0x15
#define DW_CFA_val_expression 0x16
#define DW_CFA_lo_user 0x1c
#define DW_CFA_hi_user 0x3f
/*
* Some call frame instructions encode their operands in the opcode. We
* need some helper functions to extract both the opcode and operands
* from an instruction.
*/
static inline unsigned int DW_CFA_opcode(unsigned long insn)
{
return (insn & 0xc0);
}
static inline unsigned int DW_CFA_operand(unsigned long insn)
{
return (insn & 0x3f);
}
#define DW_EH_FRAME_CIE 0 /* .eh_frame CIE IDs are 0 */
#define DW_CIE_ID 0xffffffff
#define DW64_CIE_ID 0xffffffffffffffffULL
/*
* DWARF FDE/CIE length field values.
*/
#define DW_EXT_LO 0xfffffff0
#define DW_EXT_HI 0xffffffff
#define DW_EXT_DWARF64 DW_EXT_HI
extern void dwarf_unwinder_init(void);
extern struct dwarf_frame *dwarf_unwind_stack(unsigned long,
struct dwarf_frame *);
#endif /* __ASSEMBLY__ */
#define CFI_STARTPROC .cfi_startproc
#define CFI_ENDPROC .cfi_endproc
#define CFI_DEF_CFA .cfi_def_cfa
#define CFI_REGISTER .cfi_register
#define CFI_REL_OFFSET .cfi_rel_offset
#else
/*
* Use the asm comment character to ignore the rest of the line.
*/
#define CFI_IGNORE !
#define CFI_STARTPROC CFI_IGNORE
#define CFI_ENDPROC CFI_IGNORE
#define CFI_DEF_CFA CFI_IGNORE
#define CFI_REGISTER CFI_IGNORE
#define CFI_REL_OFFSET CFI_IGNORE
#ifndef __ASSEMBLY__
static inline void dwarf_unwinder_init(void)
{
}
#endif
#endif /* CONFIG_DWARF_UNWINDER */
#endif /* __ASM_SH_DWARF_H */
arch/sh/include/asm/entry-macros.S
View file @ 0858d9c0
......@@ -31,8 +31,92 @@
#endif
.endm
#ifdef CONFIG_TRACE_IRQFLAGS
.macro TRACE_IRQS_ON
mov.l r0, @-r15
mov.l r1, @-r15
mov.l r2, @-r15
mov.l r3, @-r15
mov.l r4, @-r15
mov.l r5, @-r15
mov.l r6, @-r15
mov.l r7, @-r15
mov.l 7834f, r0
jsr @r0
nop
mov.l @r15+, r7
mov.l @r15+, r6
mov.l @r15+, r5
mov.l @r15+, r4
mov.l @r15+, r3
mov.l @r15+, r2
mov.l @r15+, r1
mov.l @r15+, r0
mov.l 7834f, r0
bra 7835f
nop
.balign 4
7834: .long trace_hardirqs_on
7835:
.endm
.macro TRACE_IRQS_OFF
mov.l r0, @-r15
mov.l r1, @-r15
mov.l r2, @-r15
mov.l r3, @-r15
mov.l r4, @-r15
mov.l r5, @-r15
mov.l r6, @-r15
mov.l r7, @-r15
mov.l 7834f, r0
jsr @r0
nop
mov.l @r15+, r7
mov.l @r15+, r6
mov.l @r15+, r5
mov.l @r15+, r4
mov.l @r15+, r3
mov.l @r15+, r2
mov.l @r15+, r1
mov.l @r15+, r0
mov.l 7834f, r0
bra 7835f
nop
.balign 4
7834: .long trace_hardirqs_off
7835:
.endm
#else
.macro TRACE_IRQS_ON
.endm
.macro TRACE_IRQS_OFF
.endm
#endif
#if defined(CONFIG_CPU_SH2A) || defined(CONFIG_CPU_SH4)
# define PREF(x) pref @x
#else
# define PREF(x) nop
#endif
/*
* Macro for use within assembly. Because the DWARF unwinder
* needs to use the frame register to unwind the stack, we
* need to setup r14 with the value of the stack pointer as
* the return address is usually on the stack somewhere.
*/
.macro setup_frame_reg
#ifdef CONFIG_DWARF_UNWINDER
mov r15, r14
#endif
.endm
arch/sh/include/asm/ftrace.h
View file @ 0858d9c0
......@@ -11,10 +11,13 @@ extern void mcount(void);
#define MCOUNT_ADDR ((long)(mcount))
#ifdef CONFIG_DYNAMIC_FTRACE
#define CALLER_ADDR ((long)(ftrace_caller))
#define CALL_ADDR ((long)(ftrace_call))
#define STUB_ADDR ((long)(ftrace_stub))
#define GRAPH_ADDR ((long)(ftrace_graph_call))
#define CALLER_ADDR ((long)(ftrace_caller))
#define MCOUNT_INSN_OFFSET ((STUB_ADDR - CALLER_ADDR) >> 1)
#define MCOUNT_INSN_OFFSET ((STUB_ADDR - CALL_ADDR) - 4)
#define GRAPH_INSN_OFFSET ((CALLER_ADDR - GRAPH_ADDR) - 4)
struct dyn_arch_ftrace {
/* No extra data needed on sh */
......
arch/sh/include/asm/hardirq.h
View file @ 0858d9c0
#ifndef __ASM_SH_HARDIRQ_H
#define __ASM_SH_HARDIRQ_H
#include <linux/threads.h>
#include <linux/irq.h>
/* entry.S is sensitive to the offsets of these fields */
typedef struct {
unsigned int __softirq_pending;
} ____cacheline_aligned irq_cpustat_t;
#include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */
extern void ack_bad_irq(unsigned int irq);
#define ack_bad_irq ack_bad_irq
#include <asm-generic/hardirq.h>
#endif /* __ASM_SH_HARDIRQ_H */
arch/sh/include/asm/hwblk.h 0 → 100644
View file @ 0858d9c0
#ifndef __ASM_SH_HWBLK_H
#define __ASM_SH_HWBLK_H
#include <asm/clock.h>
#include <asm/io.h>
#define HWBLK_CNT_USAGE 0
#define HWBLK_CNT_NR 1
#define HWBLK_AREA_FLAG_PARENT (1 << 0) /* valid parent */
#define HWBLK_AREA(_flags, _parent) \
{ \
.flags = _flags, \
.parent = _parent, \
}
struct hwblk_area {
int cnt[HWBLK_CNT_NR];
unsigned char parent;
unsigned char flags;
};
#define HWBLK(_mstp, _bit, _area) \
{ \
.mstp = (void __iomem *)_mstp, \
.bit = _bit, \
.area = _area, \
}
struct hwblk {
void __iomem *mstp;
unsigned char bit;
unsigned char area;
int cnt[HWBLK_CNT_NR];
};
struct hwblk_info {
struct hwblk_area *areas;
int nr_areas;
struct hwblk *hwblks;
int nr_hwblks;
};
/* Should be defined by processor-specific code */
int arch_hwblk_init(void);
int arch_hwblk_sleep_mode(void);
int hwblk_register(struct hwblk_info *info);
int hwblk_init(void);
void hwblk_enable(struct hwblk_info *info, int hwblk);
void hwblk_disable(struct hwblk_info *info, int hwblk);
void hwblk_cnt_inc(struct hwblk_info *info, int hwblk, int cnt);
void hwblk_cnt_dec(struct hwblk_info *info, int hwblk, int cnt);
/* allow clocks to enable and disable hardware blocks */
#define SH_HWBLK_CLK(_name, _id, _parent, _hwblk, _flags) \
{ \
.name = _name, \
.id = _id, \
.parent = _parent, \
.arch_flags = _hwblk, \
.flags = _flags, \
}
int sh_hwblk_clk_register(struct clk *clks, int nr);
#endif /* __ASM_SH_HWBLK_H */
arch/sh/include/asm/lmb.h 0 → 100644
View file @ 0858d9c0
#ifndef __ASM_SH_LMB_H
#define __ASM_SH_LMB_H
#define LMB_REAL_LIMIT 0
#endif /* __ASM_SH_LMB_H */
arch/sh/include/asm/pgtable_32.h
View file @ 0858d9c0
......@@ -20,7 +20,7 @@
* - Bit 9 is reserved by everyone and used by _PAGE_PROTNONE.
*
* - Bits 10 and 11 are low bits of the PPN that are reserved on >= 4K pages.
* Bit 10 is used for _PAGE_ACCESSED, bit 11 remains unused.
* Bit 10 is used for _PAGE_ACCESSED, and bit 11 is used for _PAGE_SPECIAL.
*
* - On 29 bit platforms, bits 31 to 29 are used for the space attributes
* and timing control which (together with bit 0) are moved into the
......@@ -52,6 +52,7 @@
#define _PAGE_PROTNONE 0x200 /* software: if not present */
#define _PAGE_ACCESSED 0x400 /* software: page referenced */
#define _PAGE_FILE _PAGE_WT /* software: pagecache or swap? */
#define _PAGE_SPECIAL 0x800 /* software: special page */
#define _PAGE_SZ_MASK (_PAGE_SZ0 | _PAGE_SZ1)
#define _PAGE_PR_MASK (_PAGE_RW | _PAGE_USER)
......@@ -148,8 +149,12 @@
# define _PAGE_SZHUGE (_PAGE_FLAGS_HARD)
#endif
/*
* Mask of bits that are to be preserved accross pgprot changes.
*/
#define _PAGE_CHG_MASK \
(PTE_MASK | _PAGE_ACCESSED | _PAGE_CACHABLE | _PAGE_DIRTY)
(PTE_MASK | _PAGE_ACCESSED | _PAGE_CACHABLE | \
_PAGE_DIRTY | _PAGE_SPECIAL)
#ifndef __ASSEMBLY__
......@@ -328,7 +333,7 @@ static inline void set_pte(pte_t *ptep, pte_t pte)
#define pte_dirty(pte) ((pte).pte_low & _PAGE_DIRTY)
#define pte_young(pte) ((pte).pte_low & _PAGE_ACCESSED)
#define pte_file(pte) ((pte).pte_low & _PAGE_FILE)
#define pte_special(pte) (0)
#define pte_special(pte) ((pte).pte_low & _PAGE_SPECIAL)
#ifdef CONFIG_X2TLB
#define pte_write(pte) ((pte).pte_high & _PAGE_EXT_USER_WRITE)
......@@ -358,8 +363,9 @@ PTE_BIT_FUNC(low, mkclean, &= ~_PAGE_DIRTY);
PTE_BIT_FUNC(low, mkdirty, |= _PAGE_DIRTY);
PTE_BIT_FUNC(low, mkold, &= ~_PAGE_ACCESSED);
PTE_BIT_FUNC(low, mkyoung, |= _PAGE_ACCESSED);
PTE_BIT_FUNC(low, mkspecial, |= _PAGE_SPECIAL);
static inline pte_t pte_mkspecial(pte_t pte) { return pte; }
#define __HAVE_ARCH_PTE_SPECIAL
/*
* Macro and implementation to make a page protection as uncachable.
......
arch/sh/include/asm/sections.h
View file @ 0858d9c0
......@@ -7,6 +7,7 @@ extern void __nosave_begin, __nosave_end;
extern long __machvec_start, __machvec_end;
extern char __uncached_start, __uncached_end;
extern char _ebss[];
extern char __start_eh_frame[], __stop_eh_frame[];
#endif /* __ASM_SH_SECTIONS_H */
arch/sh/include/asm/stacktrace.h 0 → 100644
View file @ 0858d9c0
/*
* Copyright (C) 2009 Matt Fleming
*
* Based on:
* The x86 implementation - arch/x86/include/asm/stacktrace.h
*/
#ifndef _ASM_SH_STACKTRACE_H
#define _ASM_SH_STACKTRACE_H
/* Generic stack tracer with callbacks */
struct stacktrace_ops {
void (*warning)(void *data, char *msg);
/* msg must contain %s for the symbol */
void (*warning_symbol)(void *data, char *msg, unsigned long symbol);
void (*address)(void *data, unsigned long address, int reliable);
/* On negative return stop dumping */
int (*stack)(void *data, char *name);
};
void dump_trace(struct task_struct *tsk, struct pt_regs *regs,
unsigned long *stack,
const struct stacktrace_ops *ops, void *data);
#endif /* _ASM_SH_STACKTRACE_H */
arch/sh/include/asm/suspend.h
View file @ 0858d9c0
......@@ -10,6 +10,15 @@ struct swsusp_arch_regs {
struct pt_regs user_regs;
unsigned long bank1_regs[8];
};
void sh_mobile_call_standby(unsigned long mode);
#ifdef CONFIG_CPU_IDLE
void sh_mobile_setup_cpuidle(void);
#else
static inline void sh_mobile_setup_cpuidle(void) {}
#endif
#endif
/* flags passed to assembly suspend code */
......
arch/sh/include/asm/syscall_32.h
View file @ 0858d9c0
......@@ -65,6 +65,7 @@ static inline void syscall_get_arguments(struct task_struct *task,
case 3: args[2] = regs->regs[6];
case 2: args[1] = regs->regs[5];
case 1: args[0] = regs->regs[4];
case 0:
break;
default:
BUG();
......
arch/sh/include/asm/thread_info.h
View file @ 0858d9c0
......@@ -97,7 +97,7 @@ static inline struct thread_info *current_thread_info(void)
extern struct thread_info *alloc_thread_info(struct task_struct *tsk);
extern void free_thread_info(struct thread_info *ti);
#endif /* THREAD_SHIFT < PAGE_SHIFT */
#endif /* __ASSEMBLY__ */
......@@ -116,6 +116,7 @@ extern void free_thread_info(struct thread_info *ti);
#define TIF_SYSCALL_AUDIT 5 /* syscall auditing active */
#define TIF_SECCOMP 6 /* secure computing */
#define TIF_NOTIFY_RESUME 7 /* callback before returning to user */
#define TIF_SYSCALL_FTRACE 8 /* for ftrace syscall instrumentation */
#define TIF_USEDFPU 16 /* FPU was used by this task this quantum (SMP) */
#define TIF_POLLING_NRFLAG 17 /* true if poll_idle() is polling TIF_NEED_RESCHED */
#define TIF_MEMDIE 18
......@@ -129,25 +130,27 @@ extern void free_thread_info(struct thread_info *ti);
#define _TIF_SYSCALL_AUDIT (1 << TIF_SYSCALL_AUDIT)
#define _TIF_SECCOMP (1 << TIF_SECCOMP)
#define _TIF_NOTIFY_RESUME (1 << TIF_NOTIFY_RESUME)
#define _TIF_SYSCALL_FTRACE (1 << TIF_SYSCALL_FTRACE)
#define _TIF_USEDFPU (1 << TIF_USEDFPU)
#define _TIF_POLLING_NRFLAG (1 << TIF_POLLING_NRFLAG)
#define _TIF_FREEZE (1 << TIF_FREEZE)
/*
* _TIF_ALLWORK_MASK and _TIF_WORK_MASK need to fit within a byte, or we
* _TIF_ALLWORK_MASK and _TIF_WORK_MASK need to fit within 2 bytes, or we
* blow the tst immediate size constraints and need to fix up
* arch/sh/kernel/entry-common.S.
*/
/* work to do in syscall trace */
#define _TIF_WORK_SYSCALL_MASK (_TIF_SYSCALL_TRACE | _TIF_SINGLESTEP | \
_TIF_SYSCALL_AUDIT | _TIF_SECCOMP)
_TIF_SYSCALL_AUDIT | _TIF_SECCOMP | \
_TIF_SYSCALL_FTRACE)
/* work to do on any return to u-space */
#define _TIF_ALLWORK_MASK (_TIF_SYSCALL_TRACE | _TIF_SIGPENDING | \
_TIF_NEED_RESCHED | _TIF_SYSCALL_AUDIT | \
_TIF_SINGLESTEP | _TIF_RESTORE_SIGMASK | \
_TIF_NOTIFY_RESUME)
_TIF_NOTIFY_RESUME | _TIF_SYSCALL_FTRACE)
/* work to do on interrupt/exception return */
#define _TIF_WORK_MASK (_TIF_ALLWORK_MASK & ~(_TIF_SYSCALL_TRACE | \
......
arch/sh/include/asm/unwinder.h 0 → 100644
View file @ 0858d9c0
#ifndef _LINUX_UNWINDER_H
#define _LINUX_UNWINDER_H
#include <asm/stacktrace.h>
struct unwinder {
const char *name;
struct list_head list;
int rating;
void (*dump)(struct task_struct *, struct pt_regs *,
unsigned long *, const struct stacktrace_ops *, void *);
};
extern int unwinder_init(void);
extern int unwinder_register(struct unwinder *);
extern void unwind_stack(struct task_struct *, struct pt_regs *,
unsigned long *, const struct stacktrace_ops *,
void *);
extern void stack_reader_dump(struct task_struct *, struct pt_regs *,
unsigned long *, const struct stacktrace_ops *,
void *);
#endif /* _LINUX_UNWINDER_H */
arch/sh/include/asm/vmlinux.lds.h 0 → 100644
View file @ 0858d9c0
#ifndef __ASM_SH_VMLINUX_LDS_H
#define __ASM_SH_VMLINUX_LDS_H
#include <asm-generic/vmlinux.lds.h>
#ifdef CONFIG_DWARF_UNWINDER
#define DWARF_EH_FRAME \
.eh_frame : AT(ADDR(.eh_frame) - LOAD_OFFSET) { \
VMLINUX_SYMBOL(__start_eh_frame) = .; \
*(.eh_frame) \
VMLINUX_SYMBOL(__stop_eh_frame) = .; \
}
#else
#define DWARF_EH_FRAME
#endif
#endif /* __ASM_SH_VMLINUX_LDS_H */
arch/sh/include/cpu-sh4/cpu/dma-sh4a.h
View file @ 0858d9c0
......@@ -16,7 +16,8 @@
#define DMAE0_IRQ 38
#define SH_DMAC_BASE0 0xFF608020
#define SH_DMARS_BASE 0xFF609000
#elif defined(CONFIG_CPU_SUBTYPE_SH7723)
#elif defined(CONFIG_CPU_SUBTYPE_SH7723) || \
defined(CONFIG_CPU_SUBTYPE_SH7724)
#define DMTE0_IRQ 48 /* DMAC0A*/
#define DMTE4_IRQ 40 /* DMAC0B */
#define DMTE6_IRQ 42
......
arch/sh/include/cpu-sh4/cpu/sh7722.h
View file @ 0858d9c0
......@@ -221,4 +221,18 @@ enum {
GPIO_FN_KEYOUT3, GPIO_FN_KEYOUT4_IN6, GPIO_FN_KEYOUT5_IN5,
};
enum {
HWBLK_UNKNOWN = 0,
HWBLK_TLB, HWBLK_IC, HWBLK_OC, HWBLK_URAM, HWBLK_XYMEM,
HWBLK_INTC, HWBLK_DMAC, HWBLK_SHYWAY, HWBLK_HUDI,
HWBLK_UBC, HWBLK_TMU, HWBLK_CMT, HWBLK_RWDT, HWBLK_FLCTL,
HWBLK_SCIF0, HWBLK_SCIF1, HWBLK_SCIF2, HWBLK_SIO,
HWBLK_SIOF0, HWBLK_SIOF1, HWBLK_IIC, HWBLK_RTC,
HWBLK_TPU, HWBLK_IRDA, HWBLK_SDHI, HWBLK_SIM, HWBLK_KEYSC,
HWBLK_TSIF, HWBLK_USBF, HWBLK_2DG, HWBLK_SIU, HWBLK_VOU,
HWBLK_JPU, HWBLK_BEU, HWBLK_CEU, HWBLK_VEU, HWBLK_VPU,
HWBLK_LCDC,
HWBLK_NR,
};
#endif /* __ASM_SH7722_H__ */
arch/sh/include/cpu-sh4/cpu/sh7723.h
View file @ 0858d9c0
......@@ -265,4 +265,21 @@ enum {
GPIO_FN_IDEA1, GPIO_FN_IDEA0,
};
enum {
HWBLK_UNKNOWN = 0,
HWBLK_TLB, HWBLK_IC, HWBLK_OC, HWBLK_L2C, HWBLK_ILMEM, HWBLK_FPU,
HWBLK_INTC, HWBLK_DMAC0, HWBLK_SHYWAY,
HWBLK_HUDI, HWBLK_DBG, HWBLK_UBC, HWBLK_SUBC,
HWBLK_TMU0, HWBLK_CMT, HWBLK_RWDT, HWBLK_DMAC1, HWBLK_TMU1,
HWBLK_FLCTL,
HWBLK_SCIF0, HWBLK_SCIF1, HWBLK_SCIF2,
HWBLK_SCIF3, HWBLK_SCIF4, HWBLK_SCIF5,
HWBLK_MSIOF0, HWBLK_MSIOF1, HWBLK_MERAM, HWBLK_IIC, HWBLK_RTC,
HWBLK_ATAPI, HWBLK_ADC, HWBLK_TPU, HWBLK_IRDA, HWBLK_TSIF, HWBLK_ICB,
HWBLK_SDHI0, HWBLK_SDHI1, HWBLK_KEYSC, HWBLK_USB,
HWBLK_2DG, HWBLK_SIU, HWBLK_VEU2H1, HWBLK_VOU, HWBLK_BEU, HWBLK_CEU,
HWBLK_VEU2H0, HWBLK_VPU, HWBLK_LCDC,
HWBLK_NR,
};
#endif /* __ASM_SH7723_H__ */
arch/sh/include/cpu-sh4/cpu/sh7724.h
View file @ 0858d9c0
......@@ -266,4 +266,21 @@ enum {
GPIO_FN_INTC_IRQ1, GPIO_FN_INTC_IRQ0,
};
enum {
HWBLK_UNKNOWN = 0,
HWBLK_TLB, HWBLK_IC, HWBLK_OC, HWBLK_RSMEM, HWBLK_ILMEM, HWBLK_L2C,
HWBLK_FPU, HWBLK_INTC, HWBLK_DMAC0, HWBLK_SHYWAY,
HWBLK_HUDI, HWBLK_DBG, HWBLK_UBC,
HWBLK_TMU0, HWBLK_CMT, HWBLK_RWDT, HWBLK_DMAC1, HWBLK_TMU1,
HWBLK_SCIF0, HWBLK_SCIF1, HWBLK_SCIF2, HWBLK_SCIF3,
HWBLK_SCIF4, HWBLK_SCIF5, HWBLK_MSIOF0, HWBLK_MSIOF1,
HWBLK_KEYSC, HWBLK_RTC, HWBLK_IIC0, HWBLK_IIC1,
HWBLK_MMC, HWBLK_ETHER, HWBLK_ATAPI, HWBLK_TPU, HWBLK_IRDA,
HWBLK_TSIF, HWBLK_USB1, HWBLK_USB0, HWBLK_2DG,
HWBLK_SDHI0, HWBLK_SDHI1, HWBLK_VEU1, HWBLK_CEU1, HWBLK_BEU1,
HWBLK_2DDMAC, HWBLK_SPU, HWBLK_JPU, HWBLK_VOU,
HWBLK_BEU0, HWBLK_CEU0, HWBLK_VEU0, HWBLK_VPU, HWBLK_LCDC,
HWBLK_NR,
};
#endif /* __ASM_SH7724_H__ */
arch/sh/include/mach-common/mach/migor.h deleted 100644 → 0
View file @ 9d730229
#ifndef __ASM_SH_MIGOR_H
#define __ASM_SH_MIGOR_H
/*
* linux/include/asm-sh/migor.h
*
* Copyright (C) 2008 Renesas Solutions
*
* Portions Copyright (C) 2007 Nobuhiro Iwamatsu
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
*/
#include <asm/addrspace.h>
/* GPIO */
#define PORT_PACR 0xa4050100
#define PORT_PDCR 0xa4050106
#define PORT_PECR 0xa4050108
#define PORT_PHCR 0xa405010e
#define PORT_PJCR 0xa4050110
#define PORT_PKCR 0xa4050112
#define PORT_PLCR 0xa4050114
#define PORT_PMCR 0xa4050116
#define PORT_PRCR 0xa405011c
#define PORT_PTCR 0xa4050140
#define PORT_PUCR 0xa4050142
#define PORT_PVCR 0xa4050144
#define PORT_PWCR 0xa4050146
#define PORT_PXCR 0xa4050148
#define PORT_PYCR 0xa405014a
#define PORT_PZCR 0xa405014c
#define PORT_PADR 0xa4050120
#define PORT_PHDR 0xa405012e
#define PORT_PTDR 0xa4050160
#define PORT_PWDR 0xa4050166
#define PORT_HIZCRA 0xa4050158
#define PORT_HIZCRC 0xa405015c
#define PORT_MSELCRB 0xa4050182
#define PORT_PSELA 0xa405014e
#define PORT_PSELB 0xa4050150
#define PORT_PSELC 0xa4050152
#define PORT_PSELD 0xa4050154
#define PORT_PSELE 0xa4050156
#define PORT_HIZCRA 0xa4050158
#define PORT_HIZCRB 0xa405015a
#define PORT_HIZCRC 0xa405015c
#define BSC_CS4BCR 0xfec10010
#define BSC_CS6ABCR 0xfec1001c
#define BSC_CS4WCR 0xfec10030
#include <video/sh_mobile_lcdc.h>
int migor_lcd_qvga_setup(void *board_data, void *sys_ops_handle,
struct sh_mobile_lcdc_sys_bus_ops *sys_ops);
#endif /* __ASM_SH_MIGOR_H */
arch/sh/include/mach-common/mach/romimage.h 0 → 100644
View file @ 0858d9c0
/* do nothing here by default */
arch/sh/include/mach-kfr2r09/mach/kfr2r09.h 0 → 100644
View file @ 0858d9c0
#ifndef __ASM_SH_KFR2R09_H
#define __ASM_SH_KFR2R09_H
#include <video/sh_mobile_lcdc.h>
#ifdef CONFIG_FB_SH_MOBILE_LCDC
void kfr2r09_lcd_on(void *board_data);
void kfr2r09_lcd_off(void *board_data);
int kfr2r09_lcd_setup(void *board_data, void *sys_ops_handle,
struct sh_mobile_lcdc_sys_bus_ops *sys_ops);
#else
static inline void kfr2r09_lcd_on(void *board_data) {}
static inline void kfr2r09_lcd_off(void *board_data) {}
static inline int kfr2r09_lcd_setup(void *board_data, void *sys_ops_handle,
struct sh_mobile_lcdc_sys_bus_ops *sys_ops)
{
return -ENODEV;
}
#endif
#endif /* __ASM_SH_KFR2R09_H */
arch/sh/include/mach-kfr2r09/mach/partner-jet-setup.txt 0 → 100644
View file @ 0858d9c0
LIST "partner-jet-setup.txt - 20090729 Magnus Damm"
LIST "set up enough of the kfr2r09 hardware to boot the kernel"
LIST "zImage (RAM boot)"
LIST "This script can be used to boot the kernel from RAM via JTAG:"
LIST "> < partner-jet-setup.txt"
LIST "> RD zImage, 0xa8800000"
LIST "> G=0xa8800000"
LIST "romImage (Flash boot)"
LIST "Use the following command to burn the zImage to flash via JTAG:"
LIST "> RD romImage, 0"
LIST "--------------------------------"
LIST "disable watchdog"
EW 0xa4520004, 0xa507
LIST "select mode for cs5 + cs6"
ED 0xff800020, 0xa5a50001
ED 0xfec10000, 0x0000001b
LIST "setup clocks"
ED 0xa4150004, 0x00000050
ED 0xa4150000, 0x91053508
WAIT 1
ED 0xa4150024, 0x00005000
LIST "setup pins"
EB 0xa4050120, 0x00
EB 0xa4050122, 0x00
EB 0xa4050124, 0x00
EB 0xa4050126, 0x00
EB 0xa4050128, 0xA0
EB 0xa405012A, 0x10
EB 0xa405012C, 0x00
EB 0xa405012E, 0x00
EB 0xa4050130, 0x00
EB 0xa4050132, 0x00
EB 0xa4050134, 0x01
EB 0xa4050136, 0x40
EB 0xa4050138, 0x00
EB 0xa405013A, 0x00
EB 0xa405013C, 0x00
EB 0xa405013E, 0x20
EB 0xa4050160, 0x00
EB 0xa4050162, 0x40
EB 0xa4050164, 0x03
EB 0xa4050166, 0x00
EB 0xa4050168, 0x00
EB 0xa405016A, 0x00
EB 0xa405016C, 0x00
EW 0xa405014E, 0x5660
EW 0xa4050150, 0x0145
EW 0xa4050152, 0x1550
EW 0xa4050154, 0x0200
EW 0xa4050156, 0x0040
EW 0xa4050158, 0x0000
EW 0xa405015a, 0x0000
EW 0xa405015c, 0x0000
EW 0xa405015e, 0x0000
EW 0xa4050180, 0x0000
EW 0xa4050182, 0x8002
EW 0xa4050184, 0x0000
EW 0xa405018a, 0x9991
EW 0xa405018c, 0x8011
EW 0xa405018e, 0x9550
EW 0xa4050100, 0x0000
EW 0xa4050102, 0x5540
EW 0xa4050104, 0x0000
EW 0xa4050106, 0x0000
EW 0xa4050108, 0x4550
EW 0xa405010a, 0x0130
EW 0xa405010c, 0x0555
EW 0xa405010e, 0x0000
EW 0xa4050110, 0x0000
EW 0xa4050112, 0xAAA8
EW 0xa4050114, 0x8305
EW 0xa4050116, 0x10F0
EW 0xa4050118, 0x0F50
EW 0xa405011a, 0x0000
EW 0xa405011c, 0x0000
EW 0xa405011e, 0x0555
EW 0xa4050140, 0x0000
EW 0xa4050142, 0x5141
EW 0xa4050144, 0x5005
EW 0xa4050146, 0xAAA9
EW 0xa4050148, 0xFAA9
EW 0xa405014a, 0x3000
EW 0xa405014c, 0x0000
LIST "setup sdram"
ED 0xFD000108, 0x40000301
ED 0xFD000020, 0x011B0002
ED 0xFD000030, 0x03060E02
ED 0xFD000034, 0x01020102
ED 0xFD000038, 0x01090406
ED 0xFD000008, 0x00000004
ED 0xFD000040, 0x00000001
ED 0xFD000040, 0x00000000
ED 0xFD000018, 0x00000001
WAIT 1
ED 0xFD000014, 0x00000002
ED 0xFD000060, 0x00000032
ED 0xFD000060, 0x00020000
ED 0xFD000014, 0x00000004
ED 0xFD000014, 0x00000004
ED 0xFD000010, 0x00000001
ED 0xFD000044, 0x000004AF
ED 0xFD000048, 0x20CF0037
LIST "read 16 bytes from sdram"
DD 0xa8000000, 0xa8000000, 1
DD 0xa8000004, 0xa8000004, 1
DD 0xa8000008, 0xa8000008, 1
DD 0xa800000c, 0xa800000c, 1
ED 0xFD000014, 0x00000002
ED 0xFD000014, 0x00000004
ED 0xFD000108, 0x40000300
ED 0xFD000040, 0x00010000
LIST "write to internal ram"
ED 0xfd8007fc, 0
LIST "setup cache"
ED 0xff00001c, 0x0000090b
arch/sh/include/mach-kfr2r09/mach/romimage.h 0 → 100644
View file @ 0858d9c0
/* kfr2r09 board specific boot code:
* converts the "partner-jet-script.txt" script into assembly
* the assembly code is the first code to be executed in the romImage
*/
/* The LIST command is used to include comments in the script */
.macro LIST comment
.endm
/* The ED command is used to write a 32-bit word */
.macro ED, addr, data
mov.l 1f ,r1
mov.l 2f ,r0
mov.l r0, @r1
bra 3f
nop
.align 2
1: .long \addr
2: .long \data
3:
.endm
/* The EW command is used to write a 16-bit word */
.macro EW, addr, data
mov.l 1f ,r1
mov.l 2f ,r0
mov.w r0, @r1
bra 3f
nop
.align 2
1: .long \addr
2: .long \data
3:
.endm
/* The EB command is used to write an 8-bit word */
.macro EB, addr, data
mov.l 1f ,r1
mov.l 2f ,r0
mov.b r0, @r1
bra 3f
nop
.align 2
1: .long \addr
2: .long \data
3:
.endm
/* The WAIT command is used to delay the execution */
.macro WAIT, time
mov.l 2f ,r3
1:
nop
tst r3, r3
bf/s 1b
dt r3
bra 3f
nop
.align 2
2: .long \time * 100
3:
.endm
/* The DD command is used to read a 32-bit word */
.macro DD, addr, addr2, nr
mov.l 1f ,r1
mov.l @r1, r0
bra 2f
nop
.align 2
1: .long \addr
2:
.endm
#include "partner-jet-setup.txt"
arch/sh/include/mach-migor/mach/migor.h 0 → 100644
View file @ 0858d9c0
#ifndef __ASM_SH_MIGOR_H
#define __ASM_SH_MIGOR_H
#define PORT_MSELCRB 0xa4050182
#define BSC_CS4BCR 0xfec10010
#define BSC_CS6ABCR 0xfec1001c
#define BSC_CS4WCR 0xfec10030
#include <video/sh_mobile_lcdc.h>
int migor_lcd_qvga_setup(void *board_data, void *sys_ops_handle,
struct sh_mobile_lcdc_sys_bus_ops *sys_ops);
#endif /* __ASM_SH_MIGOR_H */
arch/sh/kernel/Makefile_32
View file @ 0858d9c0
......@@ -9,10 +9,10 @@ ifdef CONFIG_FUNCTION_TRACER
CFLAGS_REMOVE_ftrace.o = -pg
endif
obj-y := debugtraps.o idle.o io.o io_generic.o irq.o \
obj-y := debugtraps.o dumpstack.o idle.o io.o io_generic.o irq.o \
machvec.o process_32.o ptrace_32.o setup.o signal_32.o \
sys_sh.o sys_sh32.o syscalls_32.o time.o topology.o \
traps.o traps_32.o
sys_sh.o sys_sh32.o syscalls_32.o time.o topology.o \
traps.o traps_32.o unwinder.o
obj-y += cpu/
obj-$(CONFIG_VSYSCALL) += vsyscall/
......@@ -29,8 +29,11 @@ obj-$(CONFIG_IO_TRAPPED) += io_trapped.o
obj-$(CONFIG_KPROBES) += kprobes.o
obj-$(CONFIG_GENERIC_GPIO) += gpio.o
obj-$(CONFIG_DYNAMIC_FTRACE) += ftrace.o
obj-$(CONFIG_FTRACE_SYSCALLS) += ftrace.o
obj-$(CONFIG_FUNCTION_GRAPH_TRACER) += ftrace.o
obj-$(CONFIG_DUMP_CODE) += disassemble.o
obj-$(CONFIG_HIBERNATION) += swsusp.o
obj-$(CONFIG_DWARF_UNWINDER) += dwarf.o
obj-$(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST) += localtimer.o
......
arch/sh/kernel/Makefile_64
View file @ 0858d9c0
......@@ -2,7 +2,7 @@ extra-y := head_64.o init_task.o vmlinux.lds
obj-y := debugtraps.o idle.o io.o io_generic.o irq.o machvec.o process_64.o \
ptrace_64.o setup.o signal_64.o sys_sh.o sys_sh64.o \
syscalls_64.o time.o topology.o traps.o traps_64.o
syscalls_64.o time.o topology.o traps.o traps_64.o unwinder.o
obj-y += cpu/
obj-$(CONFIG_SMP) += smp.o
......@@ -13,6 +13,7 @@ obj-$(CONFIG_CRASH_DUMP) += crash_dump.o
obj-$(CONFIG_STACKTRACE) += stacktrace.o
obj-$(CONFIG_IO_TRAPPED) += io_trapped.o
obj-$(CONFIG_GENERIC_GPIO) += gpio.o
obj-$(CONFIG_DWARF_UNWINDER) += dwarf.o
obj-$(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST) += localtimer.o
......
arch/sh/kernel/asm-offsets.c
View file @ 0858d9c0
......@@ -26,6 +26,7 @@ int main(void)
DEFINE(TI_CPU, offsetof(struct thread_info, cpu));
DEFINE(TI_PRE_COUNT, offsetof(struct thread_info, preempt_count));
DEFINE(TI_RESTART_BLOCK,offsetof(struct thread_info, restart_block));
DEFINE(TI_SIZE, sizeof(struct thread_info));
#ifdef CONFIG_HIBERNATION
DEFINE(PBE_ADDRESS, offsetof(struct pbe, address));
......
arch/sh/kernel/cpu/Makefile
View file @ 0858d9c0
......@@ -19,4 +19,4 @@ obj-$(CONFIG_UBC_WAKEUP) += ubc.o
obj-$(CONFIG_SH_ADC) += adc.o
obj-$(CONFIG_SH_CLK_CPG) += clock-cpg.o
obj-y += irq/ init.o clock.o
obj-y += irq/ init.o clock.o hwblk.o
arch/sh/kernel/cpu/hwblk.c 0 → 100644
View file @ 0858d9c0
#include <linux/clk.h>
#include <linux/compiler.h>
#include <linux/slab.h>
#include <linux/io.h>
#include <linux/spinlock.h>
#include <asm/suspend.h>
#include <asm/hwblk.h>
#include <asm/clock.h>
static DEFINE_SPINLOCK(hwblk_lock);
static void hwblk_area_mod_cnt(struct hwblk_info *info,
int area, int counter, int value, int goal)
{
struct hwblk_area *hap = info->areas + area;
hap->cnt[counter] += value;
if (hap->cnt[counter] != goal)
return;
if (hap->flags & HWBLK_AREA_FLAG_PARENT)
hwblk_area_mod_cnt(info, hap->parent, counter, value, goal);
}
static int __hwblk_mod_cnt(struct hwblk_info *info, int hwblk,
int counter, int value, int goal)
{
struct hwblk *hp = info->hwblks + hwblk;
hp->cnt[counter] += value;
if (hp->cnt[counter] == goal)
hwblk_area_mod_cnt(info, hp->area, counter, value, goal);
return hp->cnt[counter];
}
static void hwblk_mod_cnt(struct hwblk_info *info, int hwblk,
int counter, int value, int goal)
{
unsigned long flags;
spin_lock_irqsave(&hwblk_lock, flags);
__hwblk_mod_cnt(info, hwblk, counter, value, goal);
spin_unlock_irqrestore(&hwblk_lock, flags);
}
void hwblk_cnt_inc(struct hwblk_info *info, int hwblk, int counter)
{
hwblk_mod_cnt(info, hwblk, counter, 1, 1);
}
void hwblk_cnt_dec(struct hwblk_info *info, int hwblk, int counter)
{
hwblk_mod_cnt(info, hwblk, counter, -1, 0);
}
void hwblk_enable(struct hwblk_info *info, int hwblk)
{
struct hwblk *hp = info->hwblks + hwblk;
unsigned long tmp;
unsigned long flags;
int ret;
spin_lock_irqsave(&hwblk_lock, flags);
ret = __hwblk_mod_cnt(info, hwblk, HWBLK_CNT_USAGE, 1, 1);
if (ret == 1) {
tmp = __raw_readl(hp->mstp);
tmp &= ~(1 << hp->bit);
__raw_writel(tmp, hp->mstp);
}
spin_unlock_irqrestore(&hwblk_lock, flags);
}
void hwblk_disable(struct hwblk_info *info, int hwblk)
{
struct hwblk *hp = info->hwblks + hwblk;
unsigned long tmp;
unsigned long flags;
int ret;
spin_lock_irqsave(&hwblk_lock, flags);
ret = __hwblk_mod_cnt(info, hwblk, HWBLK_CNT_USAGE, -1, 0);
if (ret == 0) {
tmp = __raw_readl(hp->mstp);
tmp |= 1 << hp->bit;
__raw_writel(tmp, hp->mstp);
}
spin_unlock_irqrestore(&hwblk_lock, flags);
}
struct hwblk_info *hwblk_info;
int __init hwblk_register(struct hwblk_info *info)
{
hwblk_info = info;
return 0;
}
int __init __weak arch_hwblk_init(void)
{
return 0;
}
int __weak arch_hwblk_sleep_mode(void)
{
return SUSP_SH_SLEEP;
}
int __init hwblk_init(void)
{
return arch_hwblk_init();
}
/* allow clocks to enable and disable hardware blocks */
static int sh_hwblk_clk_enable(struct clk *clk)
{
if (!hwblk_info)
return -ENOENT;
hwblk_enable(hwblk_info, clk->arch_flags);
return 0;
}
static void sh_hwblk_clk_disable(struct clk *clk)
{
if (hwblk_info)
hwblk_disable(hwblk_info, clk->arch_flags);
}
static struct clk_ops sh_hwblk_clk_ops = {
.enable = sh_hwblk_clk_enable,
.disable = sh_hwblk_clk_disable,
.recalc = followparent_recalc,
};
int __init sh_hwblk_clk_register(struct clk *clks, int nr)
{
struct clk *clkp;
int ret = 0;
int k;
for (k = 0; !ret && (k < nr); k++) {
clkp = clks + k;
clkp->ops = &sh_hwblk_clk_ops;
ret |= clk_register(clkp);
}
return ret;
}
arch/sh/kernel/cpu/init.c
View file @ 0858d9c0
......@@ -3,7 +3,7 @@
*
* CPU init code
*
* Copyright (C) 2002 - 2007 Paul Mundt
* Copyright (C) 2002 - 2009 Paul Mundt
* Copyright (C) 2003 Richard Curnow
*
* This file is subject to the terms and conditions of the GNU General Public
......@@ -62,6 +62,37 @@ static void __init speculative_execution_init(void)
#define speculative_execution_init() do { } while (0)
#endif
#ifdef CONFIG_CPU_SH4A
#define EXPMASK 0xff2f0004
#define EXPMASK_RTEDS (1 << 0)
#define EXPMASK_BRDSSLP (1 << 1)
#define EXPMASK_MMCAW (1 << 4)
static void __init expmask_init(void)
{
unsigned long expmask = __raw_readl(EXPMASK);
/*
* Future proofing.
*
* Disable support for slottable sleep instruction
* and non-nop instructions in the rte delay slot.
*/
expmask &= ~(EXPMASK_RTEDS | EXPMASK_BRDSSLP);
/*
* Enable associative writes to the memory-mapped cache array
* until the cache flush ops have been rewritten.
*/
expmask |= EXPMASK_MMCAW;
__raw_writel(expmask, EXPMASK);
ctrl_barrier();
}
#else
#define expmask_init() do { } while (0)
#endif
/* 2nd-level cache init */
void __uses_jump_to_uncached __attribute__ ((weak)) l2_cache_init(void)
{
......@@ -321,4 +352,5 @@ asmlinkage void __init sh_cpu_init(void)
#endif
speculative_execution_init();
expmask_init();
}
arch/sh/kernel/cpu/sh2/entry.S
View file @ 0858d9c0
......@@ -227,8 +227,9 @@ ENTRY(sh_bios_handler)
mov.l @r15+, r14
add #8,r15
lds.l @r15+, pr
mov.l @r15+,r15
rte
mov.l @r15+,r15
nop
.align 2
1: .long gdb_vbr_vector
#endif /* CONFIG_SH_STANDARD_BIOS */
......
arch/sh/kernel/cpu/sh2a/entry.S
View file @ 0858d9c0
......@@ -176,8 +176,9 @@ ENTRY(sh_bios_handler)
movml.l @r15+,r14
add #8,r15
lds.l @r15+, pr
mov.l @r15+,r15
rte
mov.l @r15+,r15
nop
.align 2
1: .long gdb_vbr_vector
#endif /* CONFIG_SH_STANDARD_BIOS */
......
arch/sh/kernel/cpu/sh3/entry.S
View file @ 0858d9c0
......@@ -137,6 +137,7 @@ ENTRY(tlb_protection_violation_store)
mov #1, r5
call_dpf:
setup_frame_reg
mov.l 1f, r0
mov r5, r8
mov.l @r0, r6
......
arch/sh/kernel/cpu/sh4a/Makefile
View file @ 0858d9c0
......@@ -25,9 +25,9 @@ clock-$(CONFIG_CPU_SUBTYPE_SH7780) := clock-sh7780.o
clock-$(CONFIG_CPU_SUBTYPE_SH7785) := clock-sh7785.o
clock-$(CONFIG_CPU_SUBTYPE_SH7786) := clock-sh7786.o
clock-$(CONFIG_CPU_SUBTYPE_SH7343) := clock-sh7343.o
clock-$(CONFIG_CPU_SUBTYPE_SH7722) := clock-sh7722.o
clock-$(CONFIG_CPU_SUBTYPE_SH7723) := clock-sh7723.o
clock-$(CONFIG_CPU_SUBTYPE_SH7724) := clock-sh7724.o
clock-$(CONFIG_CPU_SUBTYPE_SH7722) := clock-sh7722.o hwblk-sh7722.o
clock-$(CONFIG_CPU_SUBTYPE_SH7723) := clock-sh7723.o hwblk-sh7723.o
clock-$(CONFIG_CPU_SUBTYPE_SH7724) := clock-sh7724.o hwblk-sh7724.o
clock-$(CONFIG_CPU_SUBTYPE_SH7366) := clock-sh7366.o
clock-$(CONFIG_CPU_SUBTYPE_SHX3) := clock-shx3.o
......
arch/sh/kernel/cpu/sh4a/clock-sh7722.c
View file @ 0858d9c0
......@@ -22,6 +22,8 @@
#include <linux/kernel.h>
#include <linux/io.h>
#include <asm/clock.h>
#include <asm/hwblk.h>
#include <cpu/sh7722.h>
/* SH7722 registers */
#define FRQCR 0xa4150000
......@@ -30,9 +32,6 @@
#define SCLKBCR 0xa415000c
#define IRDACLKCR 0xa4150018
#define PLLCR 0xa4150024
#define MSTPCR0 0xa4150030
#define MSTPCR1 0xa4150034
#define MSTPCR2 0xa4150038
#define DLLFRQ 0xa4150050
/* Fixed 32 KHz root clock for RTC and Power Management purposes */
......@@ -140,35 +139,37 @@ struct clk div6_clks[] = {
SH_CLK_DIV6("video_clk", &pll_clk, VCLKCR, 0),
};
#define MSTP(_str, _parent, _reg, _bit, _flags) \
SH_CLK_MSTP32(_str, -1, _parent, _reg, _bit, _flags)
#define R_CLK &r_clk
#define P_CLK &div4_clks[DIV4_P]
#define B_CLK &div4_clks[DIV4_B]
#define U_CLK &div4_clks[DIV4_U]
static struct clk mstp_clks[] = {
MSTP("uram0", &div4_clks[DIV4_U], MSTPCR0, 28, CLK_ENABLE_ON_INIT),
MSTP("xymem0", &div4_clks[DIV4_B], MSTPCR0, 26, CLK_ENABLE_ON_INIT),
MSTP("tmu0", &div4_clks[DIV4_P], MSTPCR0, 15, 0),
MSTP("cmt0", &r_clk, MSTPCR0, 14, 0),
MSTP("rwdt0", &r_clk, MSTPCR0, 13, 0),
MSTP("flctl0", &div4_clks[DIV4_P], MSTPCR0, 10, 0),
MSTP("scif0", &div4_clks[DIV4_P], MSTPCR0, 7, 0),
MSTP("scif1", &div4_clks[DIV4_P], MSTPCR0, 6, 0),
MSTP("scif2", &div4_clks[DIV4_P], MSTPCR0, 5, 0),
MSTP("i2c0", &div4_clks[DIV4_P], MSTPCR1, 9, 0),
MSTP("rtc0", &r_clk, MSTPCR1, 8, 0),
MSTP("sdhi0", &div4_clks[DIV4_P], MSTPCR2, 18, 0),
MSTP("keysc0", &r_clk, MSTPCR2, 14, 0),
MSTP("usbf0", &div4_clks[DIV4_P], MSTPCR2, 11, 0),
MSTP("2dg0", &div4_clks[DIV4_B], MSTPCR2, 9, 0),
MSTP("siu0", &div4_clks[DIV4_B], MSTPCR2, 8, 0),
MSTP("vou0", &div4_clks[DIV4_B], MSTPCR2, 5, 0),
MSTP("jpu0", &div4_clks[DIV4_B], MSTPCR2, 6, CLK_ENABLE_ON_INIT),
MSTP("beu0", &div4_clks[DIV4_B], MSTPCR2, 4, 0),
MSTP("ceu0", &div4_clks[DIV4_B], MSTPCR2, 3, 0),
MSTP("veu0", &div4_clks[DIV4_B], MSTPCR2, 2, CLK_ENABLE_ON_INIT),
MSTP("vpu0", &div4_clks[DIV4_B], MSTPCR2, 1, CLK_ENABLE_ON_INIT),
MSTP("lcdc0", &div4_clks[DIV4_B], MSTPCR2, 0, 0),
SH_HWBLK_CLK("uram0", -1, U_CLK, HWBLK_URAM, CLK_ENABLE_ON_INIT),
SH_HWBLK_CLK("xymem0", -1, B_CLK, HWBLK_XYMEM, CLK_ENABLE_ON_INIT),
SH_HWBLK_CLK("tmu0", -1, P_CLK, HWBLK_TMU, 0),
SH_HWBLK_CLK("cmt0", -1, R_CLK, HWBLK_CMT, 0),
SH_HWBLK_CLK("rwdt0", -1, R_CLK, HWBLK_RWDT, 0),
SH_HWBLK_CLK("flctl0", -1, P_CLK, HWBLK_FLCTL, 0),
SH_HWBLK_CLK("scif0", -1, P_CLK, HWBLK_SCIF0, 0),
SH_HWBLK_CLK("scif1", -1, P_CLK, HWBLK_SCIF1, 0),
SH_HWBLK_CLK("scif2", -1, P_CLK, HWBLK_SCIF2, 0),
SH_HWBLK_CLK("i2c0", -1, P_CLK, HWBLK_IIC, 0),
SH_HWBLK_CLK("rtc0", -1, R_CLK, HWBLK_RTC, 0),
SH_HWBLK_CLK("sdhi0", -1, P_CLK, HWBLK_SDHI, 0),
SH_HWBLK_CLK("keysc0", -1, R_CLK, HWBLK_KEYSC, 0),
SH_HWBLK_CLK("usbf0", -1, P_CLK, HWBLK_USBF, 0),
SH_HWBLK_CLK("2dg0", -1, B_CLK, HWBLK_2DG, 0),
SH_HWBLK_CLK("siu0", -1, B_CLK, HWBLK_SIU, 0),
SH_HWBLK_CLK("vou0", -1, B_CLK, HWBLK_VOU, 0),
SH_HWBLK_CLK("jpu0", -1, B_CLK, HWBLK_JPU, CLK_ENABLE_ON_INIT),
SH_HWBLK_CLK("beu0", -1, B_CLK, HWBLK_BEU, 0),
SH_HWBLK_CLK("ceu0", -1, B_CLK, HWBLK_CEU, 0),
SH_HWBLK_CLK("veu0", -1, B_CLK, HWBLK_VEU, CLK_ENABLE_ON_INIT),
SH_HWBLK_CLK("vpu0", -1, B_CLK, HWBLK_VPU, CLK_ENABLE_ON_INIT),
SH_HWBLK_CLK("lcdc0", -1, P_CLK, HWBLK_LCDC, 0),
};
int __init arch_clk_init(void)
......@@ -191,7 +192,7 @@ int __init arch_clk_init(void)
ret = sh_clk_div6_register(div6_clks, ARRAY_SIZE(div6_clks));
if (!ret)
ret = sh_clk_mstp32_register(mstp_clks, ARRAY_SIZE(mstp_clks));
ret = sh_hwblk_clk_register(mstp_clks, ARRAY_SIZE(mstp_clks));
return ret;
}
arch/sh/kernel/cpu/sh4a/clock-sh7723.c
View file @ 0858d9c0
......@@ -22,6 +22,8 @@
#include <linux/kernel.h>
#include <linux/io.h>
#include <asm/clock.h>
#include <asm/hwblk.h>
#include <cpu/sh7723.h>
/* SH7723 registers */
#define FRQCR 0xa4150000
......@@ -30,9 +32,6 @@
#define SCLKBCR 0xa415000c
#define IRDACLKCR 0xa4150018
#define PLLCR 0xa4150024
#define MSTPCR0 0xa4150030
#define MSTPCR1 0xa4150034
#define MSTPCR2 0xa4150038
#define DLLFRQ 0xa4150050
/* Fixed 32 KHz root clock for RTC and Power Management purposes */
......@@ -140,60 +139,64 @@ struct clk div6_clks[] = {
SH_CLK_DIV6("video_clk", &pll_clk, VCLKCR, 0),
};
#define MSTP(_str, _parent, _reg, _bit, _force_on, _need_cpg, _need_ram) \
SH_CLK_MSTP32(_str, -1, _parent, _reg, _bit, _force_on * CLK_ENABLE_ON_INIT)
#define R_CLK (&r_clk)
#define P_CLK (&div4_clks[DIV4_P])
#define B_CLK (&div4_clks[DIV4_B])
#define U_CLK (&div4_clks[DIV4_U])
#define I_CLK (&div4_clks[DIV4_I])
#define SH_CLK (&div4_clks[DIV4_SH])
static struct clk mstp_clks[] = {
/* See page 60 of Datasheet V1.0: Overview -> Block Diagram */
MSTP("tlb0", &div4_clks[DIV4_I], MSTPCR0, 31, 1, 1, 0),
MSTP("ic0", &div4_clks[DIV4_I], MSTPCR0, 30, 1, 1, 0),
MSTP("oc0", &div4_clks[DIV4_I], MSTPCR0, 29, 1, 1, 0),
MSTP("l2c0", &div4_clks[DIV4_SH], MSTPCR0, 28, 1, 1, 0),
MSTP("ilmem0", &div4_clks[DIV4_I], MSTPCR0, 27, 1, 1, 0),
MSTP("fpu0", &div4_clks[DIV4_I], MSTPCR0, 24, 1, 1, 0),
MSTP("intc0", &div4_clks[DIV4_I], MSTPCR0, 22, 1, 1, 0),
MSTP("dmac0", &div4_clks[DIV4_B], MSTPCR0, 21, 0, 1, 1),
MSTP("sh0", &div4_clks[DIV4_SH], MSTPCR0, 20, 0, 1, 0),
MSTP("hudi0", &div4_clks[DIV4_P], MSTPCR0, 19, 0, 1, 0),
MSTP("ubc0", &div4_clks[DIV4_I], MSTPCR0, 17, 0, 1, 0),
MSTP("tmu0", &div4_clks[DIV4_P], MSTPCR0, 15, 0, 1, 0),
MSTP("cmt0", &r_clk, MSTPCR0, 14, 0, 0, 0),
MSTP("rwdt0", &r_clk, MSTPCR0, 13, 0, 0, 0),
MSTP("dmac1", &div4_clks[DIV4_B], MSTPCR0, 12, 0, 1, 1),
MSTP("tmu1", &div4_clks[DIV4_P], MSTPCR0, 11, 0, 1, 0),
MSTP("flctl0", &div4_clks[DIV4_P], MSTPCR0, 10, 0, 1, 0),
MSTP("scif0", &div4_clks[DIV4_P], MSTPCR0, 9, 0, 1, 0),
MSTP("scif1", &div4_clks[DIV4_P], MSTPCR0, 8, 0, 1, 0),
MSTP("scif2", &div4_clks[DIV4_P], MSTPCR0, 7, 0, 1, 0),
MSTP("scif3", &div4_clks[DIV4_B], MSTPCR0, 6, 0, 1, 0),
MSTP("scif4", &div4_clks[DIV4_B], MSTPCR0, 5, 0, 1, 0),
MSTP("scif5", &div4_clks[DIV4_B], MSTPCR0, 4, 0, 1, 0),
MSTP("msiof0", &div4_clks[DIV4_B], MSTPCR0, 2, 0, 1, 0),
MSTP("msiof1", &div4_clks[DIV4_B], MSTPCR0, 1, 0, 1, 0),
MSTP("meram0", &div4_clks[DIV4_SH], MSTPCR0, 0, 1, 1, 0),
MSTP("i2c0", &div4_clks[DIV4_P], MSTPCR1, 9, 0, 1, 0),
MSTP("rtc0", &r_clk, MSTPCR1, 8, 0, 0, 0),
MSTP("atapi0", &div4_clks[DIV4_SH], MSTPCR2, 28, 0, 1, 0),
MSTP("adc0", &div4_clks[DIV4_P], MSTPCR2, 27, 0, 1, 0),
MSTP("tpu0", &div4_clks[DIV4_B], MSTPCR2, 25, 0, 1, 0),
MSTP("irda0", &div4_clks[DIV4_P], MSTPCR2, 24, 0, 1, 0),
MSTP("tsif0", &div4_clks[DIV4_B], MSTPCR2, 22, 0, 1, 0),
MSTP("icb0", &div4_clks[DIV4_B], MSTPCR2, 21, 0, 1, 1),
MSTP("sdhi0", &div4_clks[DIV4_B], MSTPCR2, 18, 0, 1, 0),
MSTP("sdhi1", &div4_clks[DIV4_B], MSTPCR2, 17, 0, 1, 0),
MSTP("keysc0", &r_clk, MSTPCR2, 14, 0, 0, 0),
MSTP("usb0", &div4_clks[DIV4_B], MSTPCR2, 11, 0, 1, 0),
MSTP("2dg0", &div4_clks[DIV4_B], MSTPCR2, 10, 0, 1, 1),
MSTP("siu0", &div4_clks[DIV4_B], MSTPCR2, 8, 0, 1, 0),
MSTP("veu1", &div4_clks[DIV4_B], MSTPCR2, 6, 1, 1, 1),
MSTP("vou0", &div4_clks[DIV4_B], MSTPCR2, 5, 0, 1, 1),
MSTP("beu0", &div4_clks[DIV4_B], MSTPCR2, 4, 0, 1, 1),
MSTP("ceu0", &div4_clks[DIV4_B], MSTPCR2, 3, 0, 1, 1),
MSTP("veu0", &div4_clks[DIV4_B], MSTPCR2, 2, 1, 1, 1),
MSTP("vpu0", &div4_clks[DIV4_B], MSTPCR2, 1, 1, 1, 1),
MSTP("lcdc0", &div4_clks[DIV4_B], MSTPCR2, 0, 0, 1, 1),
SH_HWBLK_CLK("tlb0", -1, I_CLK, HWBLK_TLB, CLK_ENABLE_ON_INIT),
SH_HWBLK_CLK("ic0", -1, I_CLK, HWBLK_IC, CLK_ENABLE_ON_INIT),
SH_HWBLK_CLK("oc0", -1, I_CLK, HWBLK_OC, CLK_ENABLE_ON_INIT),
SH_HWBLK_CLK("l2c0", -1, SH_CLK, HWBLK_L2C, CLK_ENABLE_ON_INIT),
SH_HWBLK_CLK("ilmem0", -1, I_CLK, HWBLK_ILMEM, CLK_ENABLE_ON_INIT),
SH_HWBLK_CLK("fpu0", -1, I_CLK, HWBLK_FPU, CLK_ENABLE_ON_INIT),
SH_HWBLK_CLK("intc0", -1, I_CLK, HWBLK_INTC, CLK_ENABLE_ON_INIT),
SH_HWBLK_CLK("dmac0", -1, B_CLK, HWBLK_DMAC0, 0),
SH_HWBLK_CLK("sh0", -1, SH_CLK, HWBLK_SHYWAY, CLK_ENABLE_ON_INIT),
SH_HWBLK_CLK("hudi0", -1, P_CLK, HWBLK_HUDI, 0),
SH_HWBLK_CLK("ubc0", -1, I_CLK, HWBLK_UBC, 0),
SH_HWBLK_CLK("tmu0", -1, P_CLK, HWBLK_TMU0, 0),
SH_HWBLK_CLK("cmt0", -1, R_CLK, HWBLK_CMT, 0),
SH_HWBLK_CLK("rwdt0", -1, R_CLK, HWBLK_RWDT, 0),
SH_HWBLK_CLK("dmac1", -1, B_CLK, HWBLK_DMAC1, 0),
SH_HWBLK_CLK("tmu1", -1, P_CLK, HWBLK_TMU1, 0),
SH_HWBLK_CLK("flctl0", -1, P_CLK, HWBLK_FLCTL, 0),
SH_HWBLK_CLK("scif0", -1, P_CLK, HWBLK_SCIF0, 0),
SH_HWBLK_CLK("scif1", -1, P_CLK, HWBLK_SCIF1, 0),
SH_HWBLK_CLK("scif2", -1, P_CLK, HWBLK_SCIF2, 0),
SH_HWBLK_CLK("scif3", -1, B_CLK, HWBLK_SCIF3, 0),
SH_HWBLK_CLK("scif4", -1, B_CLK, HWBLK_SCIF4, 0),
SH_HWBLK_CLK("scif5", -1, B_CLK, HWBLK_SCIF5, 0),
SH_HWBLK_CLK("msiof0", -1, B_CLK, HWBLK_MSIOF0, 0),
SH_HWBLK_CLK("msiof1", -1, B_CLK, HWBLK_MSIOF1, 0),
SH_HWBLK_CLK("meram0", -1, SH_CLK, HWBLK_MERAM, 0),
SH_HWBLK_CLK("i2c0", -1, P_CLK, HWBLK_IIC, 0),
SH_HWBLK_CLK("rtc0", -1, R_CLK, HWBLK_RTC, 0),
SH_HWBLK_CLK("atapi0", -1, SH_CLK, HWBLK_ATAPI, 0),
SH_HWBLK_CLK("adc0", -1, P_CLK, HWBLK_ADC, 0),
SH_HWBLK_CLK("tpu0", -1, B_CLK, HWBLK_TPU, 0),
SH_HWBLK_CLK("irda0", -1, P_CLK, HWBLK_IRDA, 0),
SH_HWBLK_CLK("tsif0", -1, B_CLK, HWBLK_TSIF, 0),
SH_HWBLK_CLK("icb0", -1, B_CLK, HWBLK_ICB, CLK_ENABLE_ON_INIT),
SH_HWBLK_CLK("sdhi0", -1, B_CLK, HWBLK_SDHI0, 0),
SH_HWBLK_CLK("sdhi1", -1, B_CLK, HWBLK_SDHI1, 0),
SH_HWBLK_CLK("keysc0", -1, R_CLK, HWBLK_KEYSC, 0),
SH_HWBLK_CLK("usb0", -1, B_CLK, HWBLK_USB, 0),
SH_HWBLK_CLK("2dg0", -1, B_CLK, HWBLK_2DG, 0),
SH_HWBLK_CLK("siu0", -1, B_CLK, HWBLK_SIU, 0),
SH_HWBLK_CLK("veu1", -1, B_CLK, HWBLK_VEU2H1, CLK_ENABLE_ON_INIT),
SH_HWBLK_CLK("vou0", -1, B_CLK, HWBLK_VOU, 0),
SH_HWBLK_CLK("beu0", -1, B_CLK, HWBLK_BEU, 0),
SH_HWBLK_CLK("ceu0", -1, B_CLK, HWBLK_CEU, 0),
SH_HWBLK_CLK("veu0", -1, B_CLK, HWBLK_VEU2H0, CLK_ENABLE_ON_INIT),
SH_HWBLK_CLK("vpu0", -1, B_CLK, HWBLK_VPU, CLK_ENABLE_ON_INIT),
SH_HWBLK_CLK("lcdc0", -1, B_CLK, HWBLK_LCDC, 0),
};
int __init arch_clk_init(void)
......@@ -216,7 +219,7 @@ int __init arch_clk_init(void)
ret = sh_clk_div6_register(div6_clks, ARRAY_SIZE(div6_clks));
if (!ret)
ret = sh_clk_mstp32_register(mstp_clks, ARRAY_SIZE(mstp_clks));
ret = sh_hwblk_clk_register(mstp_clks, ARRAY_SIZE(mstp_clks));
return ret;
}
arch/sh/kernel/cpu/sh4a/clock-sh7724.c
View file @ 0858d9c0
......@@ -22,6 +22,8 @@
#include <linux/kernel.h>
#include <linux/io.h>
#include <asm/clock.h>
#include <asm/hwblk.h>
#include <cpu/sh7724.h>
/* SH7724 registers */
#define FRQCRA 0xa4150000
......@@ -31,9 +33,6 @@
#define FCLKBCR 0xa415000c
#define IRDACLKCR 0xa4150018
#define PLLCR 0xa4150024
#define MSTPCR0 0xa4150030
#define MSTPCR1 0xa4150034
#define MSTPCR2 0xa4150038
#define SPUCLKCR 0xa415003c
#define FLLFRQ 0xa4150050
#define LSTATS 0xa4150060
......@@ -156,64 +155,67 @@ struct clk div6_clks[] = {
SH_CLK_DIV6("spu_clk", &div3_clk, SPUCLKCR, 0),
};
#define MSTP(_str, _parent, _reg, _bit, _force_on, _need_cpg, _need_ram) \
SH_CLK_MSTP32(_str, -1, _parent, _reg, _bit, _force_on * CLK_ENABLE_ON_INIT)
#define R_CLK (&r_clk)
#define P_CLK (&div4_clks[DIV4_P])
#define B_CLK (&div4_clks[DIV4_B])
#define I_CLK (&div4_clks[DIV4_I])
#define SH_CLK (&div4_clks[DIV4_SH])
static struct clk mstp_clks[] = {
MSTP("tlb0", &div4_clks[DIV4_I], MSTPCR0, 31, 1, 1, 0),
MSTP("ic0", &div4_clks[DIV4_I], MSTPCR0, 30, 1, 1, 0),
MSTP("oc0", &div4_clks[DIV4_I], MSTPCR0, 29, 1, 1, 0),
MSTP("rs0", &div4_clks[DIV4_B], MSTPCR0, 28, 1, 1, 0),
MSTP("ilmem0", &div4_clks[DIV4_I], MSTPCR0, 27, 1, 1, 0),
MSTP("l2c0", &div4_clks[DIV4_SH], MSTPCR0, 26, 1, 1, 0),
MSTP("fpu0", &div4_clks[DIV4_I], MSTPCR0, 24, 1, 1, 0),
MSTP("intc0", &div4_clks[DIV4_P], MSTPCR0, 22, 1, 1, 0),
MSTP("dmac0", &div4_clks[DIV4_B], MSTPCR0, 21, 0, 1, 1),
MSTP("sh0", &div4_clks[DIV4_SH], MSTPCR0, 20, 0, 1, 0),
MSTP("hudi0", &div4_clks[DIV4_P], MSTPCR0, 19, 0, 1, 0),
MSTP("ubc0", &div4_clks[DIV4_I], MSTPCR0, 17, 0, 1, 0),
MSTP("tmu0", &div4_clks[DIV4_P], MSTPCR0, 15, 0, 1, 0),
MSTP("cmt0", &r_clk, MSTPCR0, 14, 0, 0, 0),
MSTP("rwdt0", &r_clk, MSTPCR0, 13, 0, 0, 0),
MSTP("dmac1", &div4_clks[DIV4_B], MSTPCR0, 12, 0, 1, 1),
MSTP("tmu1", &div4_clks[DIV4_P], MSTPCR0, 10, 0, 1, 0),
MSTP("scif0", &div4_clks[DIV4_P], MSTPCR0, 9, 0, 1, 0),
MSTP("scif1", &div4_clks[DIV4_P], MSTPCR0, 8, 0, 1, 0),
MSTP("scif2", &div4_clks[DIV4_P], MSTPCR0, 7, 0, 1, 0),
MSTP("scif3", &div4_clks[DIV4_B], MSTPCR0, 6, 0, 1, 0),
MSTP("scif4", &div4_clks[DIV4_B], MSTPCR0, 5, 0, 1, 0),
MSTP("scif5", &div4_clks[DIV4_B], MSTPCR0, 4, 0, 1, 0),
MSTP("msiof0", &div4_clks[DIV4_B], MSTPCR0, 2, 0, 1, 0),
MSTP("msiof1", &div4_clks[DIV4_B], MSTPCR0, 1, 0, 1, 0),
MSTP("keysc0", &r_clk, MSTPCR1, 12, 0, 0, 0),
MSTP("rtc0", &r_clk, MSTPCR1, 11, 0, 0, 0),
MSTP("i2c0", &div4_clks[DIV4_P], MSTPCR1, 9, 0, 1, 0),
MSTP("i2c1", &div4_clks[DIV4_P], MSTPCR1, 8, 0, 1, 0),
MSTP("mmc0", &div4_clks[DIV4_B], MSTPCR2, 29, 0, 1, 0),
MSTP("eth0", &div4_clks[DIV4_B], MSTPCR2, 28, 0, 1, 0),
MSTP("atapi0", &div4_clks[DIV4_B], MSTPCR2, 26, 0, 1, 0),
MSTP("tpu0", &div4_clks[DIV4_B], MSTPCR2, 25, 0, 1, 0),
MSTP("irda0", &div4_clks[DIV4_P], MSTPCR2, 24, 0, 1, 0),
MSTP("tsif0", &div4_clks[DIV4_B], MSTPCR2, 22, 0, 1, 0),
MSTP("usb1", &div4_clks[DIV4_B], MSTPCR2, 21, 0, 1, 1),
MSTP("usb0", &div4_clks[DIV4_B], MSTPCR2, 20, 0, 1, 1),
MSTP("2dg0", &div4_clks[DIV4_B], MSTPCR2, 19, 0, 1, 1),
MSTP("sdhi0", &div4_clks[DIV4_B], MSTPCR2, 18, 0, 1, 0),
MSTP("sdhi1", &div4_clks[DIV4_B], MSTPCR2, 17, 0, 1, 0),
MSTP("veu1", &div4_clks[DIV4_B], MSTPCR2, 15, 1, 1, 1),
MSTP("ceu1", &div4_clks[DIV4_B], MSTPCR2, 13, 0, 1, 1),
MSTP("beu1", &div4_clks[DIV4_B], MSTPCR2, 12, 0, 1, 1),
MSTP("2ddmac0", &div4_clks[DIV4_SH], MSTPCR2, 10, 0, 1, 1),
MSTP("spu0", &div4_clks[DIV4_B], MSTPCR2, 9, 0, 1, 0),
MSTP("jpu0", &div4_clks[DIV4_B], MSTPCR2, 6, 1, 1, 1),
MSTP("vou0", &div4_clks[DIV4_B], MSTPCR2, 5, 0, 1, 1),
MSTP("beu0", &div4_clks[DIV4_B], MSTPCR2, 4, 0, 1, 1),
MSTP("ceu0", &div4_clks[DIV4_B], MSTPCR2, 3, 0, 1, 1),
MSTP("veu0", &div4_clks[DIV4_B], MSTPCR2, 2, 1, 1, 1),
MSTP("vpu0", &div4_clks[DIV4_B], MSTPCR2, 1, 1, 1, 1),
MSTP("lcdc0", &div4_clks[DIV4_B], MSTPCR2, 0, 0, 1, 1),
SH_HWBLK_CLK("tlb0", -1, I_CLK, HWBLK_TLB, CLK_ENABLE_ON_INIT),
SH_HWBLK_CLK("ic0", -1, I_CLK, HWBLK_IC, CLK_ENABLE_ON_INIT),
SH_HWBLK_CLK("oc0", -1, I_CLK, HWBLK_OC, CLK_ENABLE_ON_INIT),
SH_HWBLK_CLK("rs0", -1, B_CLK, HWBLK_RSMEM, CLK_ENABLE_ON_INIT),
SH_HWBLK_CLK("ilmem0", -1, I_CLK, HWBLK_ILMEM, CLK_ENABLE_ON_INIT),
SH_HWBLK_CLK("l2c0", -1, SH_CLK, HWBLK_L2C, CLK_ENABLE_ON_INIT),
SH_HWBLK_CLK("fpu0", -1, I_CLK, HWBLK_FPU, CLK_ENABLE_ON_INIT),
SH_HWBLK_CLK("intc0", -1, P_CLK, HWBLK_INTC, CLK_ENABLE_ON_INIT),
SH_HWBLK_CLK("dmac0", -1, B_CLK, HWBLK_DMAC0, 0),
SH_HWBLK_CLK("sh0", -1, SH_CLK, HWBLK_SHYWAY, CLK_ENABLE_ON_INIT),
SH_HWBLK_CLK("hudi0", -1, P_CLK, HWBLK_HUDI, 0),
SH_HWBLK_CLK("ubc0", -1, I_CLK, HWBLK_UBC, 0),
SH_HWBLK_CLK("tmu0", -1, P_CLK, HWBLK_TMU0, 0),
SH_HWBLK_CLK("cmt0", -1, R_CLK, HWBLK_CMT, 0),
SH_HWBLK_CLK("rwdt0", -1, R_CLK, HWBLK_RWDT, 0),
SH_HWBLK_CLK("dmac1", -1, B_CLK, HWBLK_DMAC1, 0),
SH_HWBLK_CLK("tmu1", -1, P_CLK, HWBLK_TMU1, 0),
SH_HWBLK_CLK("scif0", -1, P_CLK, HWBLK_SCIF0, 0),
SH_HWBLK_CLK("scif1", -1, P_CLK, HWBLK_SCIF1, 0),
SH_HWBLK_CLK("scif2", -1, P_CLK, HWBLK_SCIF2, 0),
SH_HWBLK_CLK("scif3", -1, B_CLK, HWBLK_SCIF3, 0),
SH_HWBLK_CLK("scif4", -1, B_CLK, HWBLK_SCIF4, 0),
SH_HWBLK_CLK("scif5", -1, B_CLK, HWBLK_SCIF5, 0),
SH_HWBLK_CLK("msiof0", -1, B_CLK, HWBLK_MSIOF0, 0),
SH_HWBLK_CLK("msiof1", -1, B_CLK, HWBLK_MSIOF1, 0),
SH_HWBLK_CLK("keysc0", -1, R_CLK, HWBLK_KEYSC, 0),
SH_HWBLK_CLK("rtc0", -1, R_CLK, HWBLK_RTC, 0),
SH_HWBLK_CLK("i2c0", -1, P_CLK, HWBLK_IIC0, 0),
SH_HWBLK_CLK("i2c1", -1, P_CLK, HWBLK_IIC1, 0),
SH_HWBLK_CLK("mmc0", -1, B_CLK, HWBLK_MMC, 0),
SH_HWBLK_CLK("eth0", -1, B_CLK, HWBLK_ETHER, 0),
SH_HWBLK_CLK("atapi0", -1, B_CLK, HWBLK_ATAPI, 0),
SH_HWBLK_CLK("tpu0", -1, B_CLK, HWBLK_TPU, 0),
SH_HWBLK_CLK("irda0", -1, P_CLK, HWBLK_IRDA, 0),
SH_HWBLK_CLK("tsif0", -1, B_CLK, HWBLK_TSIF, 0),
SH_HWBLK_CLK("usb1", -1, B_CLK, HWBLK_USB1, 0),
SH_HWBLK_CLK("usb0", -1, B_CLK, HWBLK_USB0, 0),
SH_HWBLK_CLK("2dg0", -1, B_CLK, HWBLK_2DG, 0),
SH_HWBLK_CLK("sdhi0", -1, B_CLK, HWBLK_SDHI0, 0),
SH_HWBLK_CLK("sdhi1", -1, B_CLK, HWBLK_SDHI1, 0),
SH_HWBLK_CLK("veu1", -1, B_CLK, HWBLK_VEU1, CLK_ENABLE_ON_INIT),
SH_HWBLK_CLK("ceu1", -1, B_CLK, HWBLK_CEU1, 0),
SH_HWBLK_CLK("beu1", -1, B_CLK, HWBLK_BEU1, 0),
SH_HWBLK_CLK("2ddmac0", -1, SH_CLK, HWBLK_2DDMAC, 0),
SH_HWBLK_CLK("spu0", -1, B_CLK, HWBLK_SPU, 0),
SH_HWBLK_CLK("jpu0", -1, B_CLK, HWBLK_JPU, CLK_ENABLE_ON_INIT),
SH_HWBLK_CLK("vou0", -1, B_CLK, HWBLK_VOU, 0),
SH_HWBLK_CLK("beu0", -1, B_CLK, HWBLK_BEU0, 0),
SH_HWBLK_CLK("ceu0", -1, B_CLK, HWBLK_CEU0, 0),
SH_HWBLK_CLK("veu0", -1, B_CLK, HWBLK_VEU0, CLK_ENABLE_ON_INIT),
SH_HWBLK_CLK("vpu0", -1, B_CLK, HWBLK_VPU, CLK_ENABLE_ON_INIT),
SH_HWBLK_CLK("lcdc0", -1, B_CLK, HWBLK_LCDC, 0),
};
int __init arch_clk_init(void)
......@@ -236,7 +238,7 @@ int __init arch_clk_init(void)
ret = sh_clk_div6_register(div6_clks, ARRAY_SIZE(div6_clks));
if (!ret)
ret = sh_clk_mstp32_register(mstp_clks, ARRAY_SIZE(mstp_clks));
ret = sh_hwblk_clk_register(mstp_clks, ARRAY_SIZE(mstp_clks));
return ret;
}
arch/sh/kernel/cpu/sh4a/hwblk-sh7722.c 0 → 100644
View file @ 0858d9c0
/*
* arch/sh/kernel/cpu/sh4a/hwblk-sh7722.c
*
* SH7722 hardware block support
*
* Copyright (C) 2009 Magnus Damm
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/io.h>
#include <asm/suspend.h>
#include <asm/hwblk.h>
#include <cpu/sh7722.h>
/* SH7722 registers */
#define MSTPCR0 0xa4150030
#define MSTPCR1 0xa4150034
#define MSTPCR2 0xa4150038
/* SH7722 Power Domains */
enum { CORE_AREA, SUB_AREA, CORE_AREA_BM };
static struct hwblk_area sh7722_hwblk_area[] = {
[CORE_AREA] = HWBLK_AREA(0, 0),
[CORE_AREA_BM] = HWBLK_AREA(HWBLK_AREA_FLAG_PARENT, CORE_AREA),
[SUB_AREA] = HWBLK_AREA(0, 0),
};
/* Table mapping HWBLK to Module Stop Bit and Power Domain */
static struct hwblk sh7722_hwblk[HWBLK_NR] = {
[HWBLK_TLB] = HWBLK(MSTPCR0, 31, CORE_AREA),
[HWBLK_IC] = HWBLK(MSTPCR0, 30, CORE_AREA),
[HWBLK_OC] = HWBLK(MSTPCR0, 29, CORE_AREA),
[HWBLK_URAM] = HWBLK(MSTPCR0, 28, CORE_AREA),
[HWBLK_XYMEM] = HWBLK(MSTPCR0, 26, CORE_AREA),
[HWBLK_INTC] = HWBLK(MSTPCR0, 22, CORE_AREA),
[HWBLK_DMAC] = HWBLK(MSTPCR0, 21, CORE_AREA_BM),
[HWBLK_SHYWAY] = HWBLK(MSTPCR0, 20, CORE_AREA),
[HWBLK_HUDI] = HWBLK(MSTPCR0, 19, CORE_AREA),
[HWBLK_UBC] = HWBLK(MSTPCR0, 17, CORE_AREA),
[HWBLK_TMU] = HWBLK(MSTPCR0, 15, CORE_AREA),
[HWBLK_CMT] = HWBLK(MSTPCR0, 14, SUB_AREA),
[HWBLK_RWDT] = HWBLK(MSTPCR0, 13, SUB_AREA),
[HWBLK_FLCTL] = HWBLK(MSTPCR0, 10, CORE_AREA),
[HWBLK_SCIF0] = HWBLK(MSTPCR0, 7, CORE_AREA),
[HWBLK_SCIF1] = HWBLK(MSTPCR0, 6, CORE_AREA),
[HWBLK_SCIF2] = HWBLK(MSTPCR0, 5, CORE_AREA),
[HWBLK_SIO] = HWBLK(MSTPCR0, 3, CORE_AREA),
[HWBLK_SIOF0] = HWBLK(MSTPCR0, 2, CORE_AREA),
[HWBLK_SIOF1] = HWBLK(MSTPCR0, 1, CORE_AREA),
[HWBLK_IIC] = HWBLK(MSTPCR1, 9, CORE_AREA),
[HWBLK_RTC] = HWBLK(MSTPCR1, 8, SUB_AREA),
[HWBLK_TPU] = HWBLK(MSTPCR2, 25, CORE_AREA),
[HWBLK_IRDA] = HWBLK(MSTPCR2, 24, CORE_AREA),
[HWBLK_SDHI] = HWBLK(MSTPCR2, 18, CORE_AREA),
[HWBLK_SIM] = HWBLK(MSTPCR2, 16, CORE_AREA),
[HWBLK_KEYSC] = HWBLK(MSTPCR2, 14, SUB_AREA),
[HWBLK_TSIF] = HWBLK(MSTPCR2, 13, SUB_AREA),
[HWBLK_USBF] = HWBLK(MSTPCR2, 11, CORE_AREA),
[HWBLK_2DG] = HWBLK(MSTPCR2, 9, CORE_AREA_BM),
[HWBLK_SIU] = HWBLK(MSTPCR2, 8, CORE_AREA),
[HWBLK_JPU] = HWBLK(MSTPCR2, 6, CORE_AREA_BM),
[HWBLK_VOU] = HWBLK(MSTPCR2, 5, CORE_AREA_BM),
[HWBLK_BEU] = HWBLK(MSTPCR2, 4, CORE_AREA_BM),
[HWBLK_CEU] = HWBLK(MSTPCR2, 3, CORE_AREA_BM),
[HWBLK_VEU] = HWBLK(MSTPCR2, 2, CORE_AREA_BM),
[HWBLK_VPU] = HWBLK(MSTPCR2, 1, CORE_AREA_BM),
[HWBLK_LCDC] = HWBLK(MSTPCR2, 0, CORE_AREA_BM),
};
static struct hwblk_info sh7722_hwblk_info = {
.areas = sh7722_hwblk_area,
.nr_areas = ARRAY_SIZE(sh7722_hwblk_area),
.hwblks = sh7722_hwblk,
.nr_hwblks = ARRAY_SIZE(sh7722_hwblk),
};
int arch_hwblk_sleep_mode(void)
{
if (!sh7722_hwblk_area[CORE_AREA].cnt[HWBLK_CNT_USAGE])
return SUSP_SH_STANDBY | SUSP_SH_SF;
if (!sh7722_hwblk_area[CORE_AREA_BM].cnt[HWBLK_CNT_USAGE])
return SUSP_SH_SLEEP | SUSP_SH_SF;
return SUSP_SH_SLEEP;
}
int __init arch_hwblk_init(void)
{
return hwblk_register(&sh7722_hwblk_info);
}
arch/sh/kernel/cpu/sh4a/hwblk-sh7723.c 0 → 100644
View file @ 0858d9c0
/*
* arch/sh/kernel/cpu/sh4a/hwblk-sh7723.c
*
* SH7723 hardware block support
*
* Copyright (C) 2009 Magnus Damm
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/io.h>
#include <asm/suspend.h>
#include <asm/hwblk.h>
#include <cpu/sh7723.h>
/* SH7723 registers */
#define MSTPCR0 0xa4150030
#define MSTPCR1 0xa4150034
#define MSTPCR2 0xa4150038
/* SH7723 Power Domains */
enum { CORE_AREA, SUB_AREA, CORE_AREA_BM };
static struct hwblk_area sh7723_hwblk_area[] = {
[CORE_AREA] = HWBLK_AREA(0, 0),
[CORE_AREA_BM] = HWBLK_AREA(HWBLK_AREA_FLAG_PARENT, CORE_AREA),
[SUB_AREA] = HWBLK_AREA(0, 0),
};
/* Table mapping HWBLK to Module Stop Bit and Power Domain */
static struct hwblk sh7723_hwblk[HWBLK_NR] = {
[HWBLK_TLB] = HWBLK(MSTPCR0, 31, CORE_AREA),
[HWBLK_IC] = HWBLK(MSTPCR0, 30, CORE_AREA),
[HWBLK_OC] = HWBLK(MSTPCR0, 29, CORE_AREA),
[HWBLK_L2C] = HWBLK(MSTPCR0, 28, CORE_AREA),
[HWBLK_ILMEM] = HWBLK(MSTPCR0, 27, CORE_AREA),
[HWBLK_FPU] = HWBLK(MSTPCR0, 24, CORE_AREA),
[HWBLK_INTC] = HWBLK(MSTPCR0, 22, CORE_AREA),
[HWBLK_DMAC0] = HWBLK(MSTPCR0, 21, CORE_AREA_BM),
[HWBLK_SHYWAY] = HWBLK(MSTPCR0, 20, CORE_AREA),
[HWBLK_HUDI] = HWBLK(MSTPCR0, 19, CORE_AREA),
[HWBLK_DBG] = HWBLK(MSTPCR0, 18, CORE_AREA),
[HWBLK_UBC] = HWBLK(MSTPCR0, 17, CORE_AREA),
[HWBLK_SUBC] = HWBLK(MSTPCR0, 16, CORE_AREA),
[HWBLK_TMU0] = HWBLK(MSTPCR0, 15, CORE_AREA),
[HWBLK_CMT] = HWBLK(MSTPCR0, 14, SUB_AREA),
[HWBLK_RWDT] = HWBLK(MSTPCR0, 13, SUB_AREA),
[HWBLK_DMAC1] = HWBLK(MSTPCR0, 12, CORE_AREA_BM),
[HWBLK_TMU1] = HWBLK(MSTPCR0, 11, CORE_AREA),
[HWBLK_FLCTL] = HWBLK(MSTPCR0, 10, CORE_AREA),
[HWBLK_SCIF0] = HWBLK(MSTPCR0, 9, CORE_AREA),
[HWBLK_SCIF1] = HWBLK(MSTPCR0, 8, CORE_AREA),
[HWBLK_SCIF2] = HWBLK(MSTPCR0, 7, CORE_AREA),
[HWBLK_SCIF3] = HWBLK(MSTPCR0, 6, CORE_AREA),
[HWBLK_SCIF4] = HWBLK(MSTPCR0, 5, CORE_AREA),
[HWBLK_SCIF5] = HWBLK(MSTPCR0, 4, CORE_AREA),
[HWBLK_MSIOF0] = HWBLK(MSTPCR0, 2, CORE_AREA),
[HWBLK_MSIOF1] = HWBLK(MSTPCR0, 1, CORE_AREA),
[HWBLK_MERAM] = HWBLK(MSTPCR0, 0, CORE_AREA),
[HWBLK_IIC] = HWBLK(MSTPCR1, 9, CORE_AREA),
[HWBLK_RTC] = HWBLK(MSTPCR1, 8, SUB_AREA),
[HWBLK_ATAPI] = HWBLK(MSTPCR2, 28, CORE_AREA_BM),
[HWBLK_ADC] = HWBLK(MSTPCR2, 27, CORE_AREA),
[HWBLK_TPU] = HWBLK(MSTPCR2, 25, CORE_AREA),
[HWBLK_IRDA] = HWBLK(MSTPCR2, 24, CORE_AREA),
[HWBLK_TSIF] = HWBLK(MSTPCR2, 22, CORE_AREA),
[HWBLK_ICB] = HWBLK(MSTPCR2, 21, CORE_AREA_BM),
[HWBLK_SDHI0] = HWBLK(MSTPCR2, 18, CORE_AREA),
[HWBLK_SDHI1] = HWBLK(MSTPCR2, 17, CORE_AREA),
[HWBLK_KEYSC] = HWBLK(MSTPCR2, 14, SUB_AREA),
[HWBLK_USB] = HWBLK(MSTPCR2, 11, CORE_AREA),
[HWBLK_2DG] = HWBLK(MSTPCR2, 10, CORE_AREA_BM),
[HWBLK_SIU] = HWBLK(MSTPCR2, 8, CORE_AREA),
[HWBLK_VEU2H1] = HWBLK(MSTPCR2, 6, CORE_AREA_BM),
[HWBLK_VOU] = HWBLK(MSTPCR2, 5, CORE_AREA_BM),
[HWBLK_BEU] = HWBLK(MSTPCR2, 4, CORE_AREA_BM),
[HWBLK_CEU] = HWBLK(MSTPCR2, 3, CORE_AREA_BM),
[HWBLK_VEU2H0] = HWBLK(MSTPCR2, 2, CORE_AREA_BM),
[HWBLK_VPU] = HWBLK(MSTPCR2, 1, CORE_AREA_BM),
[HWBLK_LCDC] = HWBLK(MSTPCR2, 0, CORE_AREA_BM),
};
static struct hwblk_info sh7723_hwblk_info = {
.areas = sh7723_hwblk_area,
.nr_areas = ARRAY_SIZE(sh7723_hwblk_area),
.hwblks = sh7723_hwblk,
.nr_hwblks = ARRAY_SIZE(sh7723_hwblk),
};
int arch_hwblk_sleep_mode(void)
{
if (!sh7723_hwblk_area[CORE_AREA].cnt[HWBLK_CNT_USAGE])
return SUSP_SH_STANDBY | SUSP_SH_SF;
if (!sh7723_hwblk_area[CORE_AREA_BM].cnt[HWBLK_CNT_USAGE])
return SUSP_SH_SLEEP | SUSP_SH_SF;
return SUSP_SH_SLEEP;
}
int __init arch_hwblk_init(void)
{
return hwblk_register(&sh7723_hwblk_info);
}
arch/sh/kernel/cpu/sh4a/hwblk-sh7724.c 0 → 100644
View file @ 0858d9c0
/*
* arch/sh/kernel/cpu/sh4a/hwblk-sh7724.c
*
* SH7724 hardware block support
*
* Copyright (C) 2009 Magnus Damm
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/io.h>
#include <asm/suspend.h>
#include <asm/hwblk.h>
#include <cpu/sh7724.h>
/* SH7724 registers */
#define MSTPCR0 0xa4150030
#define MSTPCR1 0xa4150034
#define MSTPCR2 0xa4150038
/* SH7724 Power Domains */
enum { CORE_AREA, SUB_AREA, CORE_AREA_BM };
static struct hwblk_area sh7724_hwblk_area[] = {
[CORE_AREA] = HWBLK_AREA(0, 0),
[CORE_AREA_BM] = HWBLK_AREA(HWBLK_AREA_FLAG_PARENT, CORE_AREA),
[SUB_AREA] = HWBLK_AREA(0, 0),
};
/* Table mapping HWBLK to Module Stop Bit and Power Domain */
static struct hwblk sh7724_hwblk[HWBLK_NR] = {
[HWBLK_TLB] = HWBLK(MSTPCR0, 31, CORE_AREA),
[HWBLK_IC] = HWBLK(MSTPCR0, 30, CORE_AREA),
[HWBLK_OC] = HWBLK(MSTPCR0, 29, CORE_AREA),
[HWBLK_RSMEM] = HWBLK(MSTPCR0, 28, CORE_AREA),
[HWBLK_ILMEM] = HWBLK(MSTPCR0, 27, CORE_AREA),
[HWBLK_L2C] = HWBLK(MSTPCR0, 26, CORE_AREA),
[HWBLK_FPU] = HWBLK(MSTPCR0, 24, CORE_AREA),
[HWBLK_INTC] = HWBLK(MSTPCR0, 22, CORE_AREA),
[HWBLK_DMAC0] = HWBLK(MSTPCR0, 21, CORE_AREA_BM),
[HWBLK_SHYWAY] = HWBLK(MSTPCR0, 20, CORE_AREA),
[HWBLK_HUDI] = HWBLK(MSTPCR0, 19, CORE_AREA),
[HWBLK_DBG] = HWBLK(MSTPCR0, 18, CORE_AREA),
[HWBLK_UBC] = HWBLK(MSTPCR0, 17, CORE_AREA),
[HWBLK_TMU0] = HWBLK(MSTPCR0, 15, CORE_AREA),
[HWBLK_CMT] = HWBLK(MSTPCR0, 14, SUB_AREA),
[HWBLK_RWDT] = HWBLK(MSTPCR0, 13, SUB_AREA),
[HWBLK_DMAC1] = HWBLK(MSTPCR0, 12, CORE_AREA_BM),
[HWBLK_TMU1] = HWBLK(MSTPCR0, 10, CORE_AREA),
[HWBLK_SCIF0] = HWBLK(MSTPCR0, 9, CORE_AREA),
[HWBLK_SCIF1] = HWBLK(MSTPCR0, 8, CORE_AREA),
[HWBLK_SCIF2] = HWBLK(MSTPCR0, 7, CORE_AREA),
[HWBLK_SCIF3] = HWBLK(MSTPCR0, 6, CORE_AREA),
[HWBLK_SCIF4] = HWBLK(MSTPCR0, 5, CORE_AREA),
[HWBLK_SCIF5] = HWBLK(MSTPCR0, 4, CORE_AREA),
[HWBLK_MSIOF0] = HWBLK(MSTPCR0, 2, CORE_AREA),
[HWBLK_MSIOF1] = HWBLK(MSTPCR0, 1, CORE_AREA),
[HWBLK_KEYSC] = HWBLK(MSTPCR1, 12, SUB_AREA),
[HWBLK_RTC] = HWBLK(MSTPCR1, 11, SUB_AREA),
[HWBLK_IIC0] = HWBLK(MSTPCR1, 9, CORE_AREA),
[HWBLK_IIC1] = HWBLK(MSTPCR1, 8, CORE_AREA),
[HWBLK_MMC] = HWBLK(MSTPCR2, 29, CORE_AREA),
[HWBLK_ETHER] = HWBLK(MSTPCR2, 28, CORE_AREA_BM),
[HWBLK_ATAPI] = HWBLK(MSTPCR2, 26, CORE_AREA_BM),
[HWBLK_TPU] = HWBLK(MSTPCR2, 25, CORE_AREA),
[HWBLK_IRDA] = HWBLK(MSTPCR2, 24, CORE_AREA),
[HWBLK_TSIF] = HWBLK(MSTPCR2, 22, CORE_AREA),
[HWBLK_USB1] = HWBLK(MSTPCR2, 21, CORE_AREA),
[HWBLK_USB0] = HWBLK(MSTPCR2, 20, CORE_AREA),
[HWBLK_2DG] = HWBLK(MSTPCR2, 19, CORE_AREA_BM),
[HWBLK_SDHI0] = HWBLK(MSTPCR2, 18, CORE_AREA),
[HWBLK_SDHI1] = HWBLK(MSTPCR2, 17, CORE_AREA),
[HWBLK_VEU1] = HWBLK(MSTPCR2, 15, CORE_AREA_BM),
[HWBLK_CEU1] = HWBLK(MSTPCR2, 13, CORE_AREA_BM),
[HWBLK_BEU1] = HWBLK(MSTPCR2, 12, CORE_AREA_BM),
[HWBLK_2DDMAC] = HWBLK(MSTPCR2, 10, CORE_AREA_BM),
[HWBLK_SPU] = HWBLK(MSTPCR2, 9, CORE_AREA_BM),
[HWBLK_JPU] = HWBLK(MSTPCR2, 6, CORE_AREA_BM),
[HWBLK_VOU] = HWBLK(MSTPCR2, 5, CORE_AREA_BM),
[HWBLK_BEU0] = HWBLK(MSTPCR2, 4, CORE_AREA_BM),
[HWBLK_CEU0] = HWBLK(MSTPCR2, 3, CORE_AREA_BM),
[HWBLK_VEU0] = HWBLK(MSTPCR2, 2, CORE_AREA_BM),
[HWBLK_VPU] = HWBLK(MSTPCR2, 1, CORE_AREA_BM),
[HWBLK_LCDC] = HWBLK(MSTPCR2, 0, CORE_AREA_BM),
};
static struct hwblk_info sh7724_hwblk_info = {
.areas = sh7724_hwblk_area,
.nr_areas = ARRAY_SIZE(sh7724_hwblk_area),
.hwblks = sh7724_hwblk,
.nr_hwblks = ARRAY_SIZE(sh7724_hwblk),
};
int arch_hwblk_sleep_mode(void)
{
if (!sh7724_hwblk_area[CORE_AREA].cnt[HWBLK_CNT_USAGE])
return SUSP_SH_STANDBY | SUSP_SH_SF;
if (!sh7724_hwblk_area[CORE_AREA_BM].cnt[HWBLK_CNT_USAGE])
return SUSP_SH_SLEEP | SUSP_SH_SF;
return SUSP_SH_SLEEP;
}
int __init arch_hwblk_init(void)
{
return hwblk_register(&sh7724_hwblk_info);
}
arch/sh/kernel/cpu/sh4a/setup-sh7366.c
View file @ 0858d9c0
......@@ -40,7 +40,7 @@ static struct platform_device iic_device = {
};
static struct r8a66597_platdata r8a66597_data = {
/* This set zero to all members */
.on_chip = 1,
};
static struct resource usb_host_resources[] = {
......
arch/sh/kernel/cpu/sh4a/setup-sh7722.c
View file @ 0858d9c0
......@@ -13,9 +13,11 @@
#include <linux/serial_sci.h>
#include <linux/mm.h>
#include <linux/uio_driver.h>
#include <linux/usb/m66592.h>
#include <linux/sh_timer.h>
#include <asm/clock.h>
#include <asm/mmzone.h>
#include <cpu/sh7722.h>
static struct resource rtc_resources[] = {
[0] = {
......@@ -45,11 +47,18 @@ static struct platform_device rtc_device = {
.id = -1,
.num_resources = ARRAY_SIZE(rtc_resources),
.resource = rtc_resources,
.archdata = {
.hwblk_id = HWBLK_RTC,
},
};
static struct m66592_platdata usbf_platdata = {
.on_chip = 1,
};
static struct resource usbf_resources[] = {
[0] = {
.name = "m66592_udc",
.name = "USBF",
.start = 0x04480000,
.end = 0x044800FF,
.flags = IORESOURCE_MEM,
......@@ -67,9 +76,13 @@ static struct platform_device usbf_device = {
.dev = {
.dma_mask = NULL,
.coherent_dma_mask = 0xffffffff,
.platform_data = &usbf_platdata,
},
.num_resources = ARRAY_SIZE(usbf_resources),
.resource = usbf_resources,
.archdata = {
.hwblk_id = HWBLK_USBF,
},
};
static struct resource iic_resources[] = {
......@@ -91,6 +104,9 @@ static struct platform_device iic_device = {
.id = 0, /* "i2c0" clock */
.num_resources = ARRAY_SIZE(iic_resources),
.resource = iic_resources,
.archdata = {
.hwblk_id = HWBLK_IIC,
},
};
static struct uio_info vpu_platform_data = {
......@@ -119,6 +135,9 @@ static struct platform_device vpu_device = {
},
.resource = vpu_resources,
.num_resources = ARRAY_SIZE(vpu_resources),
.archdata = {
.hwblk_id = HWBLK_VPU,
},
};
static struct uio_info veu_platform_data = {
......@@ -147,6 +166,9 @@ static struct platform_device veu_device = {
},
.resource = veu_resources,
.num_resources = ARRAY_SIZE(veu_resources),
.archdata = {
.hwblk_id = HWBLK_VEU,
},
};
static struct uio_info jpu_platform_data = {
......@@ -175,6 +197,9 @@ static struct platform_device jpu_device = {
},
.resource = jpu_resources,
.num_resources = ARRAY_SIZE(jpu_resources),
.archdata = {
.hwblk_id = HWBLK_JPU,
},
};
static struct sh_timer_config cmt_platform_data = {
......@@ -207,6 +232,9 @@ static struct platform_device cmt_device = {
},
.resource = cmt_resources,
.num_resources = ARRAY_SIZE(cmt_resources),
.archdata = {
.hwblk_id = HWBLK_CMT,
},
};
static struct sh_timer_config tmu0_platform_data = {
......@@ -238,6 +266,9 @@ static struct platform_device tmu0_device = {
},
.resource = tmu0_resources,
.num_resources = ARRAY_SIZE(tmu0_resources),
.archdata = {
.hwblk_id = HWBLK_TMU,
},
};
static struct sh_timer_config tmu1_platform_data = {
......@@ -269,6 +300,9 @@ static struct platform_device tmu1_device = {
},
.resource = tmu1_resources,
.num_resources = ARRAY_SIZE(tmu1_resources),
.archdata = {
.hwblk_id = HWBLK_TMU,
},
};
static struct sh_timer_config tmu2_platform_data = {
......@@ -299,6 +333,9 @@ static struct platform_device tmu2_device = {
},
.resource = tmu2_resources,
.num_resources = ARRAY_SIZE(tmu2_resources),
.archdata = {
.hwblk_id = HWBLK_TMU,
},
};
static struct plat_sci_port sci_platform_data[] = {
......
arch/sh/kernel/cpu/sh4a/setup-sh7723.c
View file @ 0858d9c0
......@@ -18,6 +18,7 @@
#include <linux/io.h>
#include <asm/clock.h>
#include <asm/mmzone.h>
#include <cpu/sh7723.h>
static struct uio_info vpu_platform_data = {
.name = "VPU5",
......@@ -45,6 +46,9 @@ static struct platform_device vpu_device = {
},
.resource = vpu_resources,
.num_resources = ARRAY_SIZE(vpu_resources),
.archdata = {
.hwblk_id = HWBLK_VPU,
},
};
static struct uio_info veu0_platform_data = {
......@@ -73,6 +77,9 @@ static struct platform_device veu0_device = {
},
.resource = veu0_resources,
.num_resources = ARRAY_SIZE(veu0_resources),
.archdata = {
.hwblk_id = HWBLK_VEU2H0,
},
};
static struct uio_info veu1_platform_data = {
......@@ -101,6 +108,9 @@ static struct platform_device veu1_device = {
},
.resource = veu1_resources,
.num_resources = ARRAY_SIZE(veu1_resources),
.archdata = {
.hwblk_id = HWBLK_VEU2H1,
},
};
static struct sh_timer_config cmt_platform_data = {
......@@ -133,6 +143,9 @@ static struct platform_device cmt_device = {
},
.resource = cmt_resources,
.num_resources = ARRAY_SIZE(cmt_resources),
.archdata = {
.hwblk_id = HWBLK_CMT,
},
};
static struct sh_timer_config tmu0_platform_data = {
......@@ -164,6 +177,9 @@ static struct platform_device tmu0_device = {
},
.resource = tmu0_resources,
.num_resources = ARRAY_SIZE(tmu0_resources),
.archdata = {
.hwblk_id = HWBLK_TMU0,
},
};
static struct sh_timer_config tmu1_platform_data = {
......@@ -195,6 +211,9 @@ static struct platform_device tmu1_device = {
},
.resource = tmu1_resources,
.num_resources = ARRAY_SIZE(tmu1_resources),
.archdata = {
.hwblk_id = HWBLK_TMU0,
},
};
static struct sh_timer_config tmu2_platform_data = {
......@@ -225,6 +244,9 @@ static struct platform_device tmu2_device = {
},
.resource = tmu2_resources,
.num_resources = ARRAY_SIZE(tmu2_resources),
.archdata = {
.hwblk_id = HWBLK_TMU0,
},
};
static struct sh_timer_config tmu3_platform_data = {
......@@ -255,6 +277,9 @@ static struct platform_device tmu3_device = {
},
.resource = tmu3_resources,
.num_resources = ARRAY_SIZE(tmu3_resources),
.archdata = {
.hwblk_id = HWBLK_TMU1,
},
};
static struct sh_timer_config tmu4_platform_data = {
......@@ -285,6 +310,9 @@ static struct platform_device tmu4_device = {
},
.resource = tmu4_resources,
.num_resources = ARRAY_SIZE(tmu4_resources),
.archdata = {
.hwblk_id = HWBLK_TMU1,
},
};
static struct sh_timer_config tmu5_platform_data = {
......@@ -315,6 +343,9 @@ static struct platform_device tmu5_device = {
},
.resource = tmu5_resources,
.num_resources = ARRAY_SIZE(tmu5_resources),
.archdata = {
.hwblk_id = HWBLK_TMU1,
},
};
static struct plat_sci_port sci_platform_data[] = {
......@@ -395,10 +426,13 @@ static struct platform_device rtc_device = {
.id = -1,
.num_resources = ARRAY_SIZE(rtc_resources),
.resource = rtc_resources,
.archdata = {
.hwblk_id = HWBLK_RTC,
},
};
static struct r8a66597_platdata r8a66597_data = {
/* This set zero to all members */
.on_chip = 1,
};
static struct resource sh7723_usb_host_resources[] = {
......@@ -424,6 +458,9 @@ static struct platform_device sh7723_usb_host_device = {
},
.num_resources = ARRAY_SIZE(sh7723_usb_host_resources),
.resource = sh7723_usb_host_resources,
.archdata = {
.hwblk_id = HWBLK_USB,
},
};
static struct resource iic_resources[] = {
......@@ -445,6 +482,9 @@ static struct platform_device iic_device = {
.id = 0, /* "i2c0" clock */
.num_resources = ARRAY_SIZE(iic_resources),
.resource = iic_resources,
.archdata = {
.hwblk_id = HWBLK_IIC,
},
};
static struct platform_device *sh7723_devices[] __initdata = {
......
arch/sh/kernel/cpu/sh4a/setup-sh7724.c
View file @ 0858d9c0
This diff is collapsed.
arch/sh/kernel/cpu/shmobile/Makefile
View file @ 0858d9c0
......@@ -4,3 +4,4 @@
# Power Management & Sleep mode
obj-$(CONFIG_PM) += pm.o sleep.o
obj-$(CONFIG_CPU_IDLE) += cpuidle.o
arch/sh/kernel/cpu/shmobile/cpuidle.c 0 → 100644
View file @ 0858d9c0
This diff is collapsed.
arch/sh/kernel/cpu/shmobile/pm.c
View file @ 0858d9c0
/*
* arch/sh/kernel/cpu/sh4a/pm-sh_mobile.c
* arch/sh/kernel/cpu/shmobile/pm.c
*
* Power management support code for SuperH Mobile
*
......@@ -32,20 +32,17 @@
*
* R-standby mode is unsupported, but will be added in the future
* U-standby mode is low priority since it needs bootloader hacks
*
* All modes should be tied in with cpuidle. But before that can
* happen we need to keep track of enabled hardware blocks so we
* can avoid entering sleep modes that stop clocks to hardware
* blocks that are in use even though the cpu core is idle.
*/
#define ILRAM_BASE 0xe5200000
extern const unsigned char sh_mobile_standby[];
extern const unsigned int sh_mobile_standby_size;
static void sh_mobile_call_standby(unsigned long mode)
void sh_mobile_call_standby(unsigned long mode)
{
extern void *vbr_base;
void *onchip_mem = (void *)0xe5200000; /* ILRAM */
void *onchip_mem = (void *)ILRAM_BASE;
void (*standby_onchip_mem)(unsigned long) = onchip_mem;
/* Note: Wake up from sleep may generate exceptions!
......@@ -55,11 +52,6 @@ static void sh_mobile_call_standby(unsigned long mode)
if (mode & SUSP_SH_SF)
asm volatile("ldc %0, vbr" : : "r" (onchip_mem) : "memory");
/* Copy the assembly snippet to the otherwise ununsed ILRAM */
memcpy(onchip_mem, sh_mobile_standby, sh_mobile_standby_size);
wmb();
ctrl_barrier();
/* Let assembly snippet in on-chip memory handle the rest */
standby_onchip_mem(mode);
......@@ -85,7 +77,15 @@ static struct platform_suspend_ops sh_pm_ops = {
static int __init sh_pm_init(void)
{
void *onchip_mem = (void *)ILRAM_BASE;
/* Copy the assembly snippet to the otherwise ununsed ILRAM */
memcpy(onchip_mem, sh_mobile_standby, sh_mobile_standby_size);
wmb();
ctrl_barrier();
suspend_set_ops(&sh_pm_ops);
sh_mobile_setup_cpuidle();
return 0;
}
......
arch/sh/kernel/dumpstack.c 0 → 100644
View file @ 0858d9c0
This diff is collapsed.
arch/sh/kernel/dwarf.c 0 → 100644
View file @ 0858d9c0
This diff is collapsed.
arch/sh/kernel/early_printk.c
View file @ 0858d9c0
......@@ -134,7 +134,7 @@ static void scif_sercon_init(char *s)
sci_out(&scif_port, SCFCR, 0x0030); /* TTRG=b'11 */
sci_out(&scif_port, SCSCR, 0x0030); /* TE, RE */
}
#elif defined(CONFIG_CPU_SH4)
#elif defined(CONFIG_CPU_SH4) || defined(CONFIG_CPU_SH3)
#define DEFAULT_BAUD 115200
/*
* Simple SCIF init, primarily aimed at SH7750 and other similar SH-4
......@@ -220,8 +220,7 @@ static int __init setup_early_printk(char *buf)
early_console = &scif_console;
#if !defined(CONFIG_SH_STANDARD_BIOS)
#if defined(CONFIG_CPU_SH4) || defined(CONFIG_CPU_SUBTYPE_SH7720) || \
defined(CONFIG_CPU_SUBTYPE_SH7721)
#if defined(CONFIG_CPU_SH4) || defined(CONFIG_CPU_SH3)
scif_sercon_init(buf + 6);
#endif
#endif
......
arch/sh/kernel/entry-common.S
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arch/sh/kernel/ftrace.c
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arch/sh/kernel/irq.c
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arch/sh/kernel/process_32.c
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arch/sh/kernel/ptrace_32.c
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arch/sh/kernel/setup.c
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arch/sh/kernel/sh_ksyms_32.c
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arch/sh/kernel/stacktrace.c
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arch/sh/kernel/time.c
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arch/sh/kernel/traps_32.c
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arch/sh/kernel/unwinder.c 0 → 100644
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arch/sh/kernel/vmlinux.lds.S
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arch/sh/lib/Makefile
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......@@ -24,7 +24,7 @@ memcpy-y := memcpy.o
memcpy-$(CONFIG_CPU_SH4) := memcpy-sh4.o
lib-$(CONFIG_MMU) += copy_page.o clear_page.o
lib-$(CONFIG_FUNCTION_TRACER) += mcount.o
lib-$(CONFIG_MCOUNT) += mcount.o
lib-y += $(memcpy-y) $(udivsi3-y)
EXTRA_CFLAGS += -Werror
arch/sh/lib/mcount.S
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arch/sh/mm/fault_32.c
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arch/sh/mm/ioremap_64.c
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arch/sh/mm/numa.c
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arch/sh/oprofile/backtrace.c
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arch/sh/tools/mach-types
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drivers/serial/sh-sci.c
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drivers/usb/gadget/Kconfig
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drivers/usb/gadget/m66592-udc.c
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drivers/usb/gadget/m66592-udc.h
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drivers/usb/host/Kconfig
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drivers/usb/host/r8a66597-hcd.c
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drivers/usb/host/r8a66597.h
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drivers/video/Kconfig
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drivers/video/sh_mobile_lcdcfb.c
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include/linux/usb/m66592.h 0 → 100644
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include/linux/usb/r8a66597.h
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