Commit 088de129 authored by Swapnil Jakhade's avatar Swapnil Jakhade Committed by Vinod Koul

dt-bindings: phy: cadence-torrent: Add optional input reference clock for PLL1

Add a new optional input reference clock (pll1_refclk) for PLL1.
Update bindings to support dual reference clock multilink configurations.
Signed-off-by: default avatarSwapnil Jakhade <sjakhade@cadence.com>
Acked-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: default avatarRoger Quadros <rogerq@kernel.org>
Link: https://lore.kernel.org/r/20240104133013.2911035-2-sjakhade@cadence.comSigned-off-by: default avatarVinod Koul <vkoul@kernel.org>
parent 2668cae8
...@@ -35,14 +35,18 @@ properties: ...@@ -35,14 +35,18 @@ properties:
minItems: 1 minItems: 1
maxItems: 2 maxItems: 2
description: description:
PHY reference clock for 1 item. Must contain an entry in clock-names. PHY input reference clocks - refclk (for PLL0) & pll1_refclk (for PLL1).
Optional Parent to enable output reference clock. pll1_refclk is optional and used for multi-protocol configurations requiring
separate reference clock for each protocol.
Same refclk is used for both PLL0 and PLL1 if no separate pll1_refclk is used.
Optional parent clock (phy_en_refclk) to enable a reference clock output feature
on some platforms to output either derived or received reference clock.
clock-names: clock-names:
minItems: 1 minItems: 1
items: items:
- const: refclk - const: refclk
- const: phy_en_refclk - enum: [ pll1_refclk, phy_en_refclk ]
reg: reg:
minItems: 1 minItems: 1
......
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