Commit 089cd717 authored by Chen-Yu Tsai's avatar Chen-Yu Tsai Committed by Matthias Brugger

arm64: dts: mediatek: mt8192: Mark scp_adsp clock as broken

The scp_adsp clock controller is under the SCP_ADSP power domain. This
power domain is currently not supported nor defined.

Mark the clock controller as broken for now, to avoid the system from
trying to access it, and causing the CPU or bus to stall.

Fixes: 5d2b897b ("arm64: dts: mediatek: Add mt8192 clock controllers")
Signed-off-by: default avatarChen-Yu Tsai <wenst@chromium.org>
Reviewed-by: default avatarNícolas F. R. A. Prado <nfraprado@collabora.com>
Tested-by: default avatarNícolas F. R. A. Prado <nfraprado@collabora.com>
Link: https://lore.kernel.org/r/20221229101202.1655924-1-wenst@chromium.orgSigned-off-by: default avatarMatthias Brugger <matthias.bgg@gmail.com>
parent 2d812e9e
......@@ -644,6 +644,8 @@ scp_adsp: clock-controller@10720000 {
compatible = "mediatek,mt8192-scp_adsp";
reg = <0 0x10720000 0 0x1000>;
#clock-cells = <1>;
/* power domain dependency not upstreamed */
status = "fail";
};
uart0: serial@11002000 {
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment