Commit 0932e565 authored by Konrad Dybcio's avatar Konrad Dybcio Committed by Bjorn Andersson

clk: qcom: branch: Add helper functions for setting SLEEP/WAKE bits

HLOS-controlled branch clocks on non-ancient Qualcomm platforms
feature SLEEP and WAKE fields which can be written to to configure
how long the clock hardware should wait internally before being
(un)gated. Some very sensitive clocks need to have these values
programmed to prevent putting the hardware in a not-exactly-good
state. Add definitions of these fields and introduce helpers for
setting them inside clock drivers.
Reviewed-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: default avatarKonrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230208091340.124641-3-konrad.dybcio@linaro.org
parent b594e6f6
...@@ -4,6 +4,7 @@ ...@@ -4,6 +4,7 @@
#ifndef __QCOM_CLK_BRANCH_H__ #ifndef __QCOM_CLK_BRANCH_H__
#define __QCOM_CLK_BRANCH_H__ #define __QCOM_CLK_BRANCH_H__
#include <linux/bitfield.h>
#include <linux/clk-provider.h> #include <linux/clk-provider.h>
#include "clk-regmap.h" #include "clk-regmap.h"
...@@ -41,6 +42,8 @@ struct clk_branch { ...@@ -41,6 +42,8 @@ struct clk_branch {
#define CBCR_FORCE_MEM_CORE_ON BIT(14) #define CBCR_FORCE_MEM_CORE_ON BIT(14)
#define CBCR_FORCE_MEM_PERIPH_ON BIT(13) #define CBCR_FORCE_MEM_PERIPH_ON BIT(13)
#define CBCR_FORCE_MEM_PERIPH_OFF BIT(12) #define CBCR_FORCE_MEM_PERIPH_OFF BIT(12)
#define CBCR_WAKEUP GENMASK(11, 8)
#define CBCR_SLEEP GENMASK(7, 4)
static inline void qcom_branch_set_force_mem_core(struct regmap *regmap, static inline void qcom_branch_set_force_mem_core(struct regmap *regmap,
struct clk_branch clk, bool on) struct clk_branch clk, bool on)
...@@ -63,6 +66,18 @@ static inline void qcom_branch_set_force_periph_off(struct regmap *regmap, ...@@ -63,6 +66,18 @@ static inline void qcom_branch_set_force_periph_off(struct regmap *regmap,
on ? CBCR_FORCE_MEM_PERIPH_OFF : 0); on ? CBCR_FORCE_MEM_PERIPH_OFF : 0);
} }
static inline void qcom_branch_set_wakeup(struct regmap *regmap, struct clk_branch clk, u32 val)
{
regmap_update_bits(regmap, clk.halt_reg, CBCR_WAKEUP,
FIELD_PREP(CBCR_WAKEUP, val));
}
static inline void qcom_branch_set_sleep(struct regmap *regmap, struct clk_branch clk, u32 val)
{
regmap_update_bits(regmap, clk.halt_reg, CBCR_SLEEP,
FIELD_PREP(CBCR_SLEEP, val));
}
extern const struct clk_ops clk_branch_ops; extern const struct clk_ops clk_branch_ops;
extern const struct clk_ops clk_branch2_ops; extern const struct clk_ops clk_branch2_ops;
extern const struct clk_ops clk_branch_simple_ops; extern const struct clk_ops clk_branch_simple_ops;
......
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