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Commit 0a09f01f authored by Jakub Kicinski's avatar Jakub Kicinski
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Merge branch 'amd-xgbe-miscellaneous-fixes' 

Raju Rangoju says:

====================
amd-xgbe: Miscellaneous fixes

(1) Fix the rrc for Yellow carp devices. CDR workaround path
    is disabled for YC devices, receiver reset cycle is not
    needed in such cases.

(2) Add enumerations for mailbox command and sub-commands.
    Instead of using hard-coded values, use enums.

(3) Enable PLL_CTL for fixed PHY modes only. Driver does not
    implement SW RRCM for Autoneg Off configuration, hence PLL
    is needed for fixed PHY modes only.

(4) Fix the SFP compliance codes check for DAC cables. Some of
    the passive cables have non-zero data at offset 6 in
    SFP EEPROM data. So, fix the sfp compliance codes check.

(5) Add a quirk for Molex passive cables to extend the rate
    ceiling to 0x78.
====================

Link: https://lore.kernel.org/r/20221020064215.2341278-1-Raju.Rangoju@amd.comSigned-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parents 4d814b32 170a9e34
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Showing with 68 additions and 21 deletions
drivers/net/ethernet/amd/xgbe/xgbe-pci.c
View file @ 0a09f01f
......@@ -285,6 +285,9 @@ static int xgbe_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
/* Yellow Carp devices do not need cdr workaround */
pdata->vdata->an_cdr_workaround = 0;
/* Yellow Carp devices do not need rrc */
pdata->vdata->enable_rrc = 0;
} else {
pdata->xpcs_window_def_reg = PCS_V2_WINDOW_DEF;
pdata->xpcs_window_sel_reg = PCS_V2_WINDOW_SELECT;
......@@ -483,6 +486,7 @@ static struct xgbe_version_data xgbe_v2a = {
.tx_desc_prefetch = 5,
.rx_desc_prefetch = 5,
.an_cdr_workaround = 1,
.enable_rrc = 1,
};
static struct xgbe_version_data xgbe_v2b = {
......@@ -498,6 +502,7 @@ static struct xgbe_version_data xgbe_v2b = {
.tx_desc_prefetch = 5,
.rx_desc_prefetch = 5,
.an_cdr_workaround = 1,
.enable_rrc = 1,
};
static const struct pci_device_id xgbe_pci_table[] = {
......
drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c
View file @ 0a09f01f
......@@ -239,6 +239,7 @@ enum xgbe_sfp_speed {
#define XGBE_SFP_BASE_BR_1GBE_MAX 0x0d
#define XGBE_SFP_BASE_BR_10GBE_MIN 0x64
#define XGBE_SFP_BASE_BR_10GBE_MAX 0x68
#define XGBE_MOLEX_SFP_BASE_BR_10GBE_MAX 0x78
#define XGBE_SFP_BASE_CU_CABLE_LEN 18
......@@ -284,6 +285,8 @@ struct xgbe_sfp_eeprom {
#define XGBE_BEL_FUSE_VENDOR "BEL-FUSE "
#define XGBE_BEL_FUSE_PARTNO "1GBT-SFP06 "
#define XGBE_MOLEX_VENDOR "Molex Inc. "
struct xgbe_sfp_ascii {
union {
char vendor[XGBE_SFP_BASE_VENDOR_NAME_LEN + 1];
......@@ -834,7 +837,11 @@ static bool xgbe_phy_sfp_bit_rate(struct xgbe_sfp_eeprom *sfp_eeprom,
break;
case XGBE_SFP_SPEED_10000:
min = XGBE_SFP_BASE_BR_10GBE_MIN;
max = XGBE_SFP_BASE_BR_10GBE_MAX;
if (memcmp(&sfp_eeprom->base[XGBE_SFP_BASE_VENDOR_NAME],
XGBE_MOLEX_VENDOR, XGBE_SFP_BASE_VENDOR_NAME_LEN) == 0)
max = XGBE_MOLEX_SFP_BASE_BR_10GBE_MAX;
else
max = XGBE_SFP_BASE_BR_10GBE_MAX;
break;
default:
return false;
......@@ -1151,7 +1158,10 @@ static void xgbe_phy_sfp_parse_eeprom(struct xgbe_prv_data *pdata)
}
/* Determine the type of SFP */
if (sfp_base[XGBE_SFP_BASE_10GBE_CC] & XGBE_SFP_BASE_10GBE_CC_SR)
if (phy_data->sfp_cable == XGBE_SFP_CABLE_PASSIVE &&
xgbe_phy_sfp_bit_rate(sfp_eeprom, XGBE_SFP_SPEED_10000))
phy_data->sfp_base = XGBE_SFP_BASE_10000_CR;
else if (sfp_base[XGBE_SFP_BASE_10GBE_CC] & XGBE_SFP_BASE_10GBE_CC_SR)
phy_data->sfp_base = XGBE_SFP_BASE_10000_SR;
else if (sfp_base[XGBE_SFP_BASE_10GBE_CC] & XGBE_SFP_BASE_10GBE_CC_LR)
phy_data->sfp_base = XGBE_SFP_BASE_10000_LR;
......@@ -1167,9 +1177,6 @@ static void xgbe_phy_sfp_parse_eeprom(struct xgbe_prv_data *pdata)
phy_data->sfp_base = XGBE_SFP_BASE_1000_CX;
else if (sfp_base[XGBE_SFP_BASE_1GBE_CC] & XGBE_SFP_BASE_1GBE_CC_T)
phy_data->sfp_base = XGBE_SFP_BASE_1000_T;
else if ((phy_data->sfp_cable == XGBE_SFP_CABLE_PASSIVE) &&
xgbe_phy_sfp_bit_rate(sfp_eeprom, XGBE_SFP_SPEED_10000))
phy_data->sfp_base = XGBE_SFP_BASE_10000_CR;
switch (phy_data->sfp_base) {
case XGBE_SFP_BASE_1000_T:
......@@ -1979,6 +1986,10 @@ static void xgbe_phy_rx_reset(struct xgbe_prv_data *pdata)
static void xgbe_phy_pll_ctrl(struct xgbe_prv_data *pdata, bool enable)
{
/* PLL_CTRL feature needs to be enabled for fixed PHY modes (Non-Autoneg) only */
if (pdata->phy.autoneg != AUTONEG_DISABLE)
return;
XMDIO_WRITE_BITS(pdata, MDIO_MMD_PMAPMD, MDIO_VEND2_PMA_MISC_CTRL0,
XGBE_PMA_PLL_CTRL_MASK,
enable ? XGBE_PMA_PLL_CTRL_ENABLE
......@@ -1989,7 +2000,7 @@ static void xgbe_phy_pll_ctrl(struct xgbe_prv_data *pdata, bool enable)
}
static void xgbe_phy_perform_ratechange(struct xgbe_prv_data *pdata,
unsigned int cmd, unsigned int sub_cmd)
enum xgbe_mb_cmd cmd, enum xgbe_mb_subcmd sub_cmd)
{
unsigned int s0 = 0;
unsigned int wait;
......@@ -2029,14 +2040,16 @@ static void xgbe_phy_perform_ratechange(struct xgbe_prv_data *pdata,
xgbe_phy_rx_reset(pdata);
reenable_pll:
/* Enable PLL re-initialization */
xgbe_phy_pll_ctrl(pdata, true);
/* Enable PLL re-initialization, not needed for PHY Power Off and RRC cmds */
if (cmd != XGBE_MB_CMD_POWER_OFF &&
cmd != XGBE_MB_CMD_RRC)
xgbe_phy_pll_ctrl(pdata, true);
}
static void xgbe_phy_rrc(struct xgbe_prv_data *pdata)
{
/* Receiver Reset Cycle */
xgbe_phy_perform_ratechange(pdata, 5, 0);
xgbe_phy_perform_ratechange(pdata, XGBE_MB_CMD_RRC, XGBE_MB_SUBCMD_NONE);
netif_dbg(pdata, link, pdata->netdev, "receiver reset complete\n");
}
......@@ -2046,7 +2059,7 @@ static void xgbe_phy_power_off(struct xgbe_prv_data *pdata)
struct xgbe_phy_data *phy_data = pdata->phy_data;
/* Power off */
xgbe_phy_perform_ratechange(pdata, 0, 0);
xgbe_phy_perform_ratechange(pdata, XGBE_MB_CMD_POWER_OFF, XGBE_MB_SUBCMD_NONE);
phy_data->cur_mode = XGBE_MODE_UNKNOWN;
......@@ -2061,14 +2074,17 @@ static void xgbe_phy_sfi_mode(struct xgbe_prv_data *pdata)
/* 10G/SFI */
if (phy_data->sfp_cable != XGBE_SFP_CABLE_PASSIVE) {
xgbe_phy_perform_ratechange(pdata, 3, 0);
xgbe_phy_perform_ratechange(pdata, XGBE_MB_CMD_SET_10G_SFI, XGBE_MB_SUBCMD_ACTIVE);
} else {
if (phy_data->sfp_cable_len <= 1)
xgbe_phy_perform_ratechange(pdata, 3, 1);
xgbe_phy_perform_ratechange(pdata, XGBE_MB_CMD_SET_10G_SFI,
XGBE_MB_SUBCMD_PASSIVE_1M);
else if (phy_data->sfp_cable_len <= 3)
xgbe_phy_perform_ratechange(pdata, 3, 2);
xgbe_phy_perform_ratechange(pdata, XGBE_MB_CMD_SET_10G_SFI,
XGBE_MB_SUBCMD_PASSIVE_3M);
else
xgbe_phy_perform_ratechange(pdata, 3, 3);
xgbe_phy_perform_ratechange(pdata, XGBE_MB_CMD_SET_10G_SFI,
XGBE_MB_SUBCMD_PASSIVE_OTHER);
}
phy_data->cur_mode = XGBE_MODE_SFI;
......@@ -2083,7 +2099,7 @@ static void xgbe_phy_x_mode(struct xgbe_prv_data *pdata)
xgbe_phy_set_redrv_mode(pdata);
/* 1G/X */
xgbe_phy_perform_ratechange(pdata, 1, 3);
xgbe_phy_perform_ratechange(pdata, XGBE_MB_CMD_SET_1G, XGBE_MB_SUBCMD_1G_KX);
phy_data->cur_mode = XGBE_MODE_X;
......@@ -2097,7 +2113,7 @@ static void xgbe_phy_sgmii_1000_mode(struct xgbe_prv_data *pdata)
xgbe_phy_set_redrv_mode(pdata);
/* 1G/SGMII */
xgbe_phy_perform_ratechange(pdata, 1, 2);
xgbe_phy_perform_ratechange(pdata, XGBE_MB_CMD_SET_1G, XGBE_MB_SUBCMD_1G_SGMII);
phy_data->cur_mode = XGBE_MODE_SGMII_1000;
......@@ -2111,7 +2127,7 @@ static void xgbe_phy_sgmii_100_mode(struct xgbe_prv_data *pdata)
xgbe_phy_set_redrv_mode(pdata);
/* 100M/SGMII */
xgbe_phy_perform_ratechange(pdata, 1, 1);
xgbe_phy_perform_ratechange(pdata, XGBE_MB_CMD_SET_1G, XGBE_MB_SUBCMD_100MBITS);
phy_data->cur_mode = XGBE_MODE_SGMII_100;
......@@ -2125,7 +2141,7 @@ static void xgbe_phy_kr_mode(struct xgbe_prv_data *pdata)
xgbe_phy_set_redrv_mode(pdata);
/* 10G/KR */
xgbe_phy_perform_ratechange(pdata, 4, 0);
xgbe_phy_perform_ratechange(pdata, XGBE_MB_CMD_SET_10G_KR, XGBE_MB_SUBCMD_NONE);
phy_data->cur_mode = XGBE_MODE_KR;
......@@ -2139,7 +2155,7 @@ static void xgbe_phy_kx_2500_mode(struct xgbe_prv_data *pdata)
xgbe_phy_set_redrv_mode(pdata);
/* 2.5G/KX */
xgbe_phy_perform_ratechange(pdata, 2, 0);
xgbe_phy_perform_ratechange(pdata, XGBE_MB_CMD_SET_2_5G, XGBE_MB_SUBCMD_NONE);
phy_data->cur_mode = XGBE_MODE_KX_2500;
......@@ -2153,7 +2169,7 @@ static void xgbe_phy_kx_1000_mode(struct xgbe_prv_data *pdata)
xgbe_phy_set_redrv_mode(pdata);
/* 1G/KX */
xgbe_phy_perform_ratechange(pdata, 1, 3);
xgbe_phy_perform_ratechange(pdata, XGBE_MB_CMD_SET_1G, XGBE_MB_SUBCMD_1G_KX);
phy_data->cur_mode = XGBE_MODE_KX_1000;
......@@ -2640,7 +2656,7 @@ static int xgbe_phy_link_status(struct xgbe_prv_data *pdata, int *an_restart)
}
/* No link, attempt a receiver reset cycle */
if (phy_data->rrc_count++ > XGBE_RRC_FREQUENCY) {
if (pdata->vdata->enable_rrc && phy_data->rrc_count++ > XGBE_RRC_FREQUENCY) {
phy_data->rrc_count = 0;
xgbe_phy_rrc(pdata);
}
......
drivers/net/ethernet/amd/xgbe/xgbe.h
View file @ 0a09f01f
......@@ -611,6 +611,31 @@ enum xgbe_mdio_mode {
XGBE_MDIO_MODE_CL45,
};
enum xgbe_mb_cmd {
XGBE_MB_CMD_POWER_OFF = 0,
XGBE_MB_CMD_SET_1G,
XGBE_MB_CMD_SET_2_5G,
XGBE_MB_CMD_SET_10G_SFI,
XGBE_MB_CMD_SET_10G_KR,
XGBE_MB_CMD_RRC
};
enum xgbe_mb_subcmd {
XGBE_MB_SUBCMD_NONE = 0,
/* 10GbE SFP subcommands */
XGBE_MB_SUBCMD_ACTIVE = 0,
XGBE_MB_SUBCMD_PASSIVE_1M,
XGBE_MB_SUBCMD_PASSIVE_3M,
XGBE_MB_SUBCMD_PASSIVE_OTHER,
/* 1GbE Mode subcommands */
XGBE_MB_SUBCMD_10MBITS = 0,
XGBE_MB_SUBCMD_100MBITS,
XGBE_MB_SUBCMD_1G_SGMII,
XGBE_MB_SUBCMD_1G_KX
};
struct xgbe_phy {
struct ethtool_link_ksettings lks;
......@@ -1013,6 +1038,7 @@ struct xgbe_version_data {
unsigned int tx_desc_prefetch;
unsigned int rx_desc_prefetch;
unsigned int an_cdr_workaround;
unsigned int enable_rrc;
};
struct xgbe_prv_data {
......
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