Commit 0b98b163 authored by Thomas Gleixner's avatar Thomas Gleixner

m68k: Convert irq function namespace

Scripted with coccinelle.
Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
parent a3b975c4
...@@ -44,7 +44,7 @@ int show_interrupts(struct seq_file *p, void *v) ...@@ -44,7 +44,7 @@ int show_interrupts(struct seq_file *p, void *v)
if (ap) { if (ap) {
seq_printf(p, "%3d: ", irq); seq_printf(p, "%3d: ", irq);
seq_printf(p, "%10u ", kstat_irqs(irq)); seq_printf(p, "%10u ", kstat_irqs(irq));
seq_printf(p, "%14s ", get_irq_desc_chip(desc)->name); seq_printf(p, "%14s ", irq_desc_get_chip(desc)->name);
seq_printf(p, "%s", ap->name); seq_printf(p, "%s", ap->name);
for (ap = ap->next; ap; ap = ap->next) for (ap = ap->next; ap; ap = ap->next)
......
...@@ -51,8 +51,8 @@ static int __init mcf_intc2_init(void) ...@@ -51,8 +51,8 @@ static int __init mcf_intc2_init(void)
/* GPIO interrupt sources */ /* GPIO interrupt sources */
for (irq = MCFINTC2_GPIOIRQ0; (irq <= MCFINTC2_GPIOIRQ7); irq++) { for (irq = MCFINTC2_GPIOIRQ0; (irq <= MCFINTC2_GPIOIRQ7); irq++) {
set_irq_chip(irq, &intc2_irq_gpio_chip); irq_set_chip(irq, &intc2_irq_gpio_chip);
set_irq_handler(irq, handle_edge_irq); irq_set_handler(irq, handle_edge_irq);
} }
return 0; return 0;
......
...@@ -145,7 +145,7 @@ static int intc_irq_set_type(struct irq_data *d, unsigned int type) ...@@ -145,7 +145,7 @@ static int intc_irq_set_type(struct irq_data *d, unsigned int type)
*/ */
static void intc_external_irq(unsigned int irq, struct irq_desc *desc) static void intc_external_irq(unsigned int irq, struct irq_desc *desc)
{ {
get_irq_desc_chip(desc)->irq_ack(&desc->irq_data); irq_desc_get_chip(desc)->irq_ack(&desc->irq_data);
handle_simple_irq(irq, desc); handle_simple_irq(irq, desc);
} }
...@@ -171,16 +171,16 @@ void __init init_IRQ(void) ...@@ -171,16 +171,16 @@ void __init init_IRQ(void)
writel(0x88888888, MCF_MBAR + MCFSIM_ICR4); writel(0x88888888, MCF_MBAR + MCFSIM_ICR4);
for (irq = 0; (irq < NR_IRQS); irq++) { for (irq = 0; (irq < NR_IRQS); irq++) {
set_irq_chip(irq, &intc_irq_chip); irq_set_chip(irq, &intc_irq_chip);
edge = 0; edge = 0;
if ((irq >= MCFINT_VECBASE) && (irq <= MCFINT_VECMAX)) if ((irq >= MCFINT_VECBASE) && (irq <= MCFINT_VECMAX))
edge = intc_irqmap[irq - MCFINT_VECBASE].ack; edge = intc_irqmap[irq - MCFINT_VECBASE].ack;
if (edge) { if (edge) {
set_irq_type(irq, IRQ_TYPE_EDGE_RISING); irq_set_irq_type(irq, IRQ_TYPE_EDGE_RISING);
set_irq_handler(irq, intc_external_irq); irq_set_handler(irq, intc_external_irq);
} else { } else {
set_irq_type(irq, IRQ_TYPE_LEVEL_HIGH); irq_set_irq_type(irq, IRQ_TYPE_LEVEL_HIGH);
set_irq_handler(irq, handle_level_irq); irq_set_handler(irq, handle_level_irq);
} }
} }
} }
......
...@@ -179,8 +179,8 @@ void __init init_IRQ(void) ...@@ -179,8 +179,8 @@ void __init init_IRQ(void)
IMR = ~0; IMR = ~0;
for (i = 0; (i < NR_IRQS); i++) { for (i = 0; (i < NR_IRQS); i++) {
set_irq_chip(i, &intc_irq_chip); irq_set_chip(i, &intc_irq_chip);
set_irq_handler(i, handle_level_irq); irq_set_handler(i, handle_level_irq);
} }
} }
...@@ -132,8 +132,8 @@ void init_IRQ(void) ...@@ -132,8 +132,8 @@ void init_IRQ(void)
pquicc->intr_cimr = 0x00000000; pquicc->intr_cimr = 0x00000000;
for (i = 0; (i < NR_IRQS); i++) { for (i = 0; (i < NR_IRQS); i++) {
set_irq_chip(i, &intc_irq_chip); irq_set_chip(i, &intc_irq_chip);
set_irq_handler(i, handle_level_irq); irq_set_handler(i, handle_level_irq);
} }
} }
...@@ -164,7 +164,7 @@ static int intc_irq_set_type(struct irq_data *d, unsigned int type) ...@@ -164,7 +164,7 @@ static int intc_irq_set_type(struct irq_data *d, unsigned int type)
} }
if (tb) if (tb)
set_irq_handler(irq, handle_edge_irq); irq_set_handler(irq, handle_edge_irq);
irq -= EINT0; irq -= EINT0;
pa = __raw_readw(MCFEPORT_EPPAR); pa = __raw_readw(MCFEPORT_EPPAR);
...@@ -204,11 +204,11 @@ void __init init_IRQ(void) ...@@ -204,11 +204,11 @@ void __init init_IRQ(void)
for (irq = MCFINT_VECBASE; (irq < MCFINT_VECBASE + NR_VECS); irq++) { for (irq = MCFINT_VECBASE; (irq < MCFINT_VECBASE + NR_VECS); irq++) {
if ((irq >= EINT1) && (irq <=EINT7)) if ((irq >= EINT1) && (irq <=EINT7))
set_irq_chip(irq, &intc_irq_chip_edge_port); irq_set_chip(irq, &intc_irq_chip_edge_port);
else else
set_irq_chip(irq, &intc_irq_chip); irq_set_chip(irq, &intc_irq_chip);
set_irq_type(irq, IRQ_TYPE_LEVEL_HIGH); irq_set_irq_type(irq, IRQ_TYPE_LEVEL_HIGH);
set_irq_handler(irq, handle_level_irq); irq_set_handler(irq, handle_level_irq);
} }
} }
...@@ -141,7 +141,7 @@ static int intc_irq_set_type(struct irq_data *d, unsigned int type) ...@@ -141,7 +141,7 @@ static int intc_irq_set_type(struct irq_data *d, unsigned int type)
} }
if (tb) if (tb)
set_irq_handler(irq, handle_edge_irq); irq_set_handler(irq, handle_edge_irq);
ebit = irq2ebit(irq) * 2; ebit = irq2ebit(irq) * 2;
pa = __raw_readw(MCFEPORT_EPPAR); pa = __raw_readw(MCFEPORT_EPPAR);
...@@ -181,11 +181,11 @@ void __init init_IRQ(void) ...@@ -181,11 +181,11 @@ void __init init_IRQ(void)
eirq = MCFINT_VECBASE + 64 + (MCFINTC1_ICR0 ? 64 : 0); eirq = MCFINT_VECBASE + 64 + (MCFINTC1_ICR0 ? 64 : 0);
for (irq = MCFINT_VECBASE; (irq < eirq); irq++) { for (irq = MCFINT_VECBASE; (irq < eirq); irq++) {
if ((irq >= EINT1) && (irq <= EINT7)) if ((irq >= EINT1) && (irq <= EINT7))
set_irq_chip(irq, &intc_irq_chip_edge_port); irq_set_chip(irq, &intc_irq_chip_edge_port);
else else
set_irq_chip(irq, &intc_irq_chip); irq_set_chip(irq, &intc_irq_chip);
set_irq_type(irq, IRQ_TYPE_LEVEL_HIGH); irq_set_irq_type(irq, IRQ_TYPE_LEVEL_HIGH);
set_irq_handler(irq, handle_level_irq); irq_set_handler(irq, handle_level_irq);
} }
} }
...@@ -143,9 +143,9 @@ void __init init_IRQ(void) ...@@ -143,9 +143,9 @@ void __init init_IRQ(void)
mcf_maskimr(0xffffffff); mcf_maskimr(0xffffffff);
for (irq = 0; (irq < NR_IRQS); irq++) { for (irq = 0; (irq < NR_IRQS); irq++) {
set_irq_chip(irq, &intc_irq_chip); irq_set_chip(irq, &intc_irq_chip);
set_irq_type(irq, IRQ_TYPE_LEVEL_HIGH); irq_set_irq_type(irq, IRQ_TYPE_LEVEL_HIGH);
set_irq_handler(irq, handle_level_irq); irq_set_handler(irq, handle_level_irq);
} }
} }
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