Commit 0e1c7a94 authored by Ramesh Shanmugasundaram's avatar Ramesh Shanmugasundaram Committed by Geert Uytterhoeven

pinctrl: sh-pfc: r8a7795: Add CAN FD support

This patch adds CAN FD[0-1] pinmux support for R-Car H3 ES2.0. The pin
config is identical to H3 ES1.*.
Signed-off-by: default avatarRamesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>
Reviewed-by: default avatarFabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent a678abfe
...@@ -1813,6 +1813,29 @@ static const unsigned int can_clk_mux[] = { ...@@ -1813,6 +1813,29 @@ static const unsigned int can_clk_mux[] = {
CAN_CLK_MARK, CAN_CLK_MARK,
}; };
/* - CAN FD --------------------------------------------------------------- */
static const unsigned int canfd0_data_a_pins[] = {
/* TX, RX */
RCAR_GP_PIN(1, 23), RCAR_GP_PIN(1, 24),
};
static const unsigned int canfd0_data_a_mux[] = {
CANFD0_TX_A_MARK, CANFD0_RX_A_MARK,
};
static const unsigned int canfd0_data_b_pins[] = {
/* TX, RX */
RCAR_GP_PIN(2, 0), RCAR_GP_PIN(2, 1),
};
static const unsigned int canfd0_data_b_mux[] = {
CANFD0_TX_B_MARK, CANFD0_RX_B_MARK,
};
static const unsigned int canfd1_data_pins[] = {
/* TX, RX */
RCAR_GP_PIN(1, 22), RCAR_GP_PIN(1, 26),
};
static const unsigned int canfd1_data_mux[] = {
CANFD1_TX_MARK, CANFD1_RX_MARK,
};
/* - DRIF0 --------------------------------------------------------------- */ /* - DRIF0 --------------------------------------------------------------- */
static const unsigned int drif0_ctrl_a_pins[] = { static const unsigned int drif0_ctrl_a_pins[] = {
/* CLK, SYNC */ /* CLK, SYNC */
...@@ -3879,6 +3902,9 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { ...@@ -3879,6 +3902,9 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
SH_PFC_PIN_GROUP(can0_data_b), SH_PFC_PIN_GROUP(can0_data_b),
SH_PFC_PIN_GROUP(can1_data), SH_PFC_PIN_GROUP(can1_data),
SH_PFC_PIN_GROUP(can_clk), SH_PFC_PIN_GROUP(can_clk),
SH_PFC_PIN_GROUP(canfd0_data_a),
SH_PFC_PIN_GROUP(canfd0_data_b),
SH_PFC_PIN_GROUP(canfd1_data),
SH_PFC_PIN_GROUP(drif0_ctrl_a), SH_PFC_PIN_GROUP(drif0_ctrl_a),
SH_PFC_PIN_GROUP(drif0_data0_a), SH_PFC_PIN_GROUP(drif0_data0_a),
SH_PFC_PIN_GROUP(drif0_data1_a), SH_PFC_PIN_GROUP(drif0_data1_a),
...@@ -4203,6 +4229,15 @@ static const char * const can_clk_groups[] = { ...@@ -4203,6 +4229,15 @@ static const char * const can_clk_groups[] = {
"can_clk", "can_clk",
}; };
static const char * const canfd0_groups[] = {
"canfd0_data_a",
"canfd0_data_b",
};
static const char * const canfd1_groups[] = {
"canfd1_data",
};
static const char * const drif0_groups[] = { static const char * const drif0_groups[] = {
"drif0_ctrl_a", "drif0_ctrl_a",
"drif0_data0_a", "drif0_data0_a",
...@@ -4611,6 +4646,8 @@ static const struct sh_pfc_function pinmux_functions[] = { ...@@ -4611,6 +4646,8 @@ static const struct sh_pfc_function pinmux_functions[] = {
SH_PFC_FUNCTION(can0), SH_PFC_FUNCTION(can0),
SH_PFC_FUNCTION(can1), SH_PFC_FUNCTION(can1),
SH_PFC_FUNCTION(can_clk), SH_PFC_FUNCTION(can_clk),
SH_PFC_FUNCTION(canfd0),
SH_PFC_FUNCTION(canfd1),
SH_PFC_FUNCTION(drif0), SH_PFC_FUNCTION(drif0),
SH_PFC_FUNCTION(drif1), SH_PFC_FUNCTION(drif1),
SH_PFC_FUNCTION(drif2), SH_PFC_FUNCTION(drif2),
......
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