Commit 0e3f10e6 authored by Zhang Rui's avatar Zhang Rui

tools/power/turbostat: Add MSR_CORE_C1_RES support for spr_features

Add MSR_CORE_C1_RES support for spr_features because both Sapphirerapids
and Emeraldrapids support this MSR.
Signed-off-by: default avatarZhang Rui <rui.zhang@intel.com>
parent 37f68a29
......@@ -667,6 +667,7 @@ static const struct platform_features spr_features = {
.bclk_freq = BCLK_100MHZ,
.supported_cstates = CC1 | CC6 | PC2 | PC6,
.cst_limit = CST_LIMIT_SKX,
.has_msr_core_c1_res = 1,
.has_irtl_msrs = 1,
.has_cst_prewake_bit = 1,
.trl_msrs = TRL_BASE | TRL_CORECOUNT,
......
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