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Commit 0f7aa9d2 authored by Vandana BN's avatar Vandana BN Committed by Greg Kroah-Hartman
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Staging: kpc2000: kpc_dma: Resolve trailing whitespace error reported by checkpatch 

Resolve trailing whitespace error from checkpatch.pl
ERROR: trailing whitespace
Signed-off-by: default avatarVandana BN <bnvandana@gmail.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent a8f7e0c9
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Inline Side-by-side
Showing with 131 additions and 131 deletions
drivers/staging/kpc2000/kpc_dma/dma.c
View file @ 0f7aa9d2
......@@ -15,10 +15,10 @@ static
irqreturn_t ndd_irq_handler(int irq, void *dev_id)
{
struct kpc_dma_device *ldev = (struct kpc_dma_device*)dev_id;
if ((GetEngineControl(ldev) & ENG_CTL_IRQ_ACTIVE) || (ldev->desc_completed->MyDMAAddr != GetEngineCompletePtr(ldev)))
schedule_work(&ldev->irq_work);
return IRQ_HANDLED;
}
......@@ -28,42 +28,42 @@ void ndd_irq_worker(struct work_struct *ws)
struct kpc_dma_descriptor *cur;
struct kpc_dma_device *eng = container_of(ws, struct kpc_dma_device, irq_work);
lock_engine(eng);
if (GetEngineCompletePtr(eng) == 0)
goto out;
if (eng->desc_completed->MyDMAAddr == GetEngineCompletePtr(eng))
goto out;
cur = eng->desc_completed;
do {
cur = cur->Next;
dev_dbg(&eng->pldev->dev, "Handling completed descriptor %p (acd = %p)\n", cur, cur->acd);
BUG_ON(cur == eng->desc_next); // Ordering failure.
if (cur->DescControlFlags & DMA_DESC_CTL_SOP){
eng->accumulated_bytes = 0;
eng->accumulated_flags = 0;
}
eng->accumulated_bytes += cur->DescByteCount;
if (cur->DescStatusFlags & DMA_DESC_STS_ERROR)
eng->accumulated_flags |= ACD_FLAG_ENG_ACCUM_ERROR;
if (cur->DescStatusFlags & DMA_DESC_STS_SHORT)
eng->accumulated_flags |= ACD_FLAG_ENG_ACCUM_SHORT;
if (cur->DescControlFlags & DMA_DESC_CTL_EOP){
if (cur->acd)
transfer_complete_cb(cur->acd, eng->accumulated_bytes, eng->accumulated_flags | ACD_FLAG_DONE);
}
eng->desc_completed = cur;
} while (cur->MyDMAAddr != GetEngineCompletePtr(eng));
out:
SetClearEngineControl(eng, ENG_CTL_IRQ_ACTIVE, 0);
unlock_engine(eng);
}
......@@ -73,12 +73,12 @@ void start_dma_engine(struct kpc_dma_device *eng)
{
eng->desc_next = eng->desc_pool_first;
eng->desc_completed = eng->desc_pool_last;
// Setup the engine pointer registers
SetEngineNextPtr(eng, eng->desc_pool_first);
SetEngineSWPtr(eng, eng->desc_pool_first);
ClearEngineCompletePtr(eng);
WriteEngineControl(eng, ENG_CTL_DMA_ENABLE | ENG_CTL_IRQ_ENABLE);
}
......@@ -92,67 +92,67 @@ int setup_dma_engine(struct kpc_dma_device *eng, u32 desc_cnt)
unsigned int i;
int rv;
dev_dbg(&eng->pldev->dev, "Setting up DMA engine [%p]\n", eng);
caps = GetEngineCapabilities(eng);
if (WARN(!(caps & ENG_CAP_PRESENT), "setup_dma_engine() called for DMA Engine at %p which isn't present in hardware!\n", eng))
return -ENXIO;
if (caps & ENG_CAP_DIRECTION){
eng->dir = DMA_FROM_DEVICE;
} else {
eng->dir = DMA_TO_DEVICE;
}
eng->desc_pool_cnt = desc_cnt;
eng->desc_pool = dma_pool_create("KPC DMA Descriptors", &eng->pldev->dev, sizeof(struct kpc_dma_descriptor), DMA_DESC_ALIGNMENT, 4096);
eng->desc_pool_first = dma_pool_alloc(eng->desc_pool, GFP_KERNEL | GFP_DMA, &head_handle);
if (!eng->desc_pool_first){
dev_err(&eng->pldev->dev, "setup_dma_engine: couldn't allocate desc_pool_first!\n");
dma_pool_destroy(eng->desc_pool);
return -ENOMEM;
}
eng->desc_pool_first->MyDMAAddr = head_handle;
clear_desc(eng->desc_pool_first);
cur = eng->desc_pool_first;
for (i = 1 ; i < eng->desc_pool_cnt ; i++){
next = dma_pool_alloc(eng->desc_pool, GFP_KERNEL | GFP_DMA, &next_handle);
if (next == NULL)
goto done_alloc;
clear_desc(next);
next->MyDMAAddr = next_handle;
cur->DescNextDescPtr = next_handle;
cur->Next = next;
cur = next;
}
done_alloc:
// Link the last descriptor back to the first, so it's a circular linked list
cur->Next = eng->desc_pool_first;
cur->DescNextDescPtr = eng->desc_pool_first->MyDMAAddr;
eng->desc_pool_last = cur;
eng->desc_completed = eng->desc_pool_last;
// Setup work queue
INIT_WORK(&eng->irq_work, ndd_irq_worker);
// Grab IRQ line
rv = request_irq(eng->irq, ndd_irq_handler, IRQF_SHARED, KP_DRIVER_NAME_DMA_CONTROLLER, eng);
if (rv){
dev_err(&eng->pldev->dev, "setup_dma_engine: failed to request_irq: %d\n", rv);
return rv;
}
// Turn on the engine!
start_dma_engine(eng);
unlock_engine(eng);
return 0;
}
......@@ -160,10 +160,10 @@ void stop_dma_engine(struct kpc_dma_device *eng)
{
unsigned long timeout;
dev_dbg(&eng->pldev->dev, "Destroying DMA engine [%p]\n", eng);
// Disable the descriptor engine
WriteEngineControl(eng, 0);
// Wait for descriptor engine to finish current operaion
timeout = jiffies + (HZ / 2);
while (GetEngineControl(eng) & ENG_CTL_DMA_RUNNING){
......@@ -172,10 +172,10 @@ void stop_dma_engine(struct kpc_dma_device *eng)
break;
}
}
// Request a reset
WriteEngineControl(eng, ENG_CTL_DMA_RESET_REQUEST);
// Wait for reset request to be processed
timeout = jiffies + (HZ / 2);
while (GetEngineControl(eng) & (ENG_CTL_DMA_RUNNING | ENG_CTL_DMA_RESET_REQUEST)){
......@@ -184,10 +184,10 @@ void stop_dma_engine(struct kpc_dma_device *eng)
break;
}
}
// Request a reset
WriteEngineControl(eng, ENG_CTL_DMA_RESET);
// And wait for reset to complete
timeout = jiffies + (HZ / 2);
while (GetEngineControl(eng) & ENG_CTL_DMA_RESET){
......@@ -196,12 +196,12 @@ void stop_dma_engine(struct kpc_dma_device *eng)
break;
}
}
// Clear any persistent bits just to make sure there is no residue from the reset
SetClearEngineControl(eng, (ENG_CTL_IRQ_ACTIVE | ENG_CTL_DESC_COMPLETE | ENG_CTL_DESC_ALIGN_ERR | ENG_CTL_DESC_FETCH_ERR | ENG_CTL_SW_ABORT_ERR | ENG_CTL_DESC_CHAIN_END | ENG_CTL_DMA_WAITING_PERSIST), 0);
// Reset performance counters
// Completely disable the engine
WriteEngineControl(eng, 0);
}
......@@ -211,12 +211,12 @@ void destroy_dma_engine(struct kpc_dma_device *eng)
struct kpc_dma_descriptor * cur;
dma_addr_t cur_handle;
unsigned int i;
stop_dma_engine(eng);
cur = eng->desc_pool_first;
cur_handle = eng->desc_pool_first->MyDMAAddr;
for (i = 0 ; i < eng->desc_pool_cnt ; i++){
struct kpc_dma_descriptor *next = cur->Next;
dma_addr_t next_handle = cur->DescNextDescPtr;
......@@ -224,9 +224,9 @@ void destroy_dma_engine(struct kpc_dma_device *eng)
cur_handle = next_handle;
cur = next;
}
dma_pool_destroy(eng->desc_pool);
free_irq(eng->irq, eng);
}
......
drivers/staging/kpc2000/kpc_dma/fileops.c
View file @ 0f7aa9d2
This diff is collapsed.
drivers/staging/kpc2000/kpc_dma/kpc_dma_driver.c
View file @ 0f7aa9d2
......@@ -58,8 +58,8 @@ static ssize_t show_engine_regs(struct device *dev, struct device_attribute *at
if (!pldev) return 0;
ldev = platform_get_drvdata(pldev);
if (!ldev) return 0;
return scnprintf(buf, PAGE_SIZE,
return scnprintf(buf, PAGE_SIZE,
"EngineControlStatus = 0x%08x\n"
"RegNextDescPtr = 0x%08x\n"
"RegSWDescPtr = 0x%08x\n"
......@@ -95,25 +95,25 @@ int kpc_dma_probe(struct platform_device *pldev)
struct resource *r = NULL;
int rv = 0;
dev_t dev;
struct kpc_dma_device *ldev = kzalloc(sizeof(struct kpc_dma_device), GFP_KERNEL);
if (!ldev){
dev_err(&pldev->dev, "kpc_dma_probe: unable to kzalloc space for kpc_dma_device\n");
rv = -ENOMEM;
goto err_rv;
}
dev_dbg(&pldev->dev, "kpc_dma_probe(pldev = [%p]) ldev = [%p]\n", pldev, ldev);
INIT_LIST_HEAD(&ldev->list);
ldev->pldev = pldev;
platform_set_drvdata(pldev, ldev);
atomic_set(&ldev->open_count, 1);
mutex_init(&ldev->sem);
lock_engine(ldev);
// Get Engine regs resource
r = platform_get_resource(pldev, IORESOURCE_MEM, 0);
if (!r){
......@@ -127,7 +127,7 @@ int kpc_dma_probe(struct platform_device *pldev)
rv = -ENXIO;
goto err_kfree;
}
r = platform_get_resource(pldev, IORESOURCE_IRQ, 0);
if (!r){
dev_err(&ldev->pldev->dev, "kpc_dma_probe: didn't get the IRQ resource!\n");
......@@ -135,7 +135,7 @@ int kpc_dma_probe(struct platform_device *pldev)
goto err_kfree;
}
ldev->irq = r->start;
// Setup miscdev struct
dev = MKDEV(assigned_major_num, pldev->id);
ldev->kpc_dma_dev = device_create(kpc_dma_class, &pldev->dev, dev, ldev, "kpc_dma%d", pldev->id);
......@@ -143,25 +143,25 @@ int kpc_dma_probe(struct platform_device *pldev)
dev_err(&ldev->pldev->dev, "kpc_dma_probe: device_create failed: %d\n", rv);
goto err_kfree;
}
// Setup the DMA engine
rv = setup_dma_engine(ldev, 30);
if (rv){
dev_err(&ldev->pldev->dev, "kpc_dma_probe: failed to setup_dma_engine: %d\n", rv);
goto err_misc_dereg;
}
// Setup the sysfs files
rv = sysfs_create_files(&(ldev->pldev->dev.kobj), ndd_attr_list);
if (rv){
dev_err(&ldev->pldev->dev, "kpc_dma_probe: Failed to add sysfs files: %d\n", rv);
goto err_destroy_eng;
}
kpc_dma_add_device(ldev);
return 0;
err_destroy_eng:
destroy_dma_engine(ldev);
err_misc_dereg:
......@@ -178,16 +178,16 @@ int kpc_dma_remove(struct platform_device *pldev)
struct kpc_dma_device *ldev = platform_get_drvdata(pldev);
if (!ldev)
return -ENXIO;
dev_dbg(&ldev->pldev->dev, "kpc_dma_remove(pldev = [%p]) ldev = [%p]\n", pldev, ldev);
lock_engine(ldev);
sysfs_remove_files(&(ldev->pldev->dev.kobj), ndd_attr_list);
destroy_dma_engine(ldev);
kpc_dma_del_device(ldev);
device_destroy(kpc_dma_class, MKDEV(assigned_major_num, ldev->pldev->id));
kfree(ldev);
return 0;
}
......@@ -206,29 +206,29 @@ static
int __init kpc_dma_driver_init(void)
{
int err;
err = __register_chrdev(KPC_DMA_CHAR_MAJOR, 0, KPC_DMA_NUM_MINORS, "kpc_dma", &kpc_dma_fops);
if (err < 0){
pr_err("Can't allocate a major number (%d) for kpc_dma (err = %d)\n", KPC_DMA_CHAR_MAJOR, err);
goto fail_chrdev_register;
}
assigned_major_num = err;
kpc_dma_class = class_create(THIS_MODULE, "kpc_dma");
err = PTR_ERR(kpc_dma_class);
if (IS_ERR(kpc_dma_class)){
pr_err("Can't create class kpc_dma (err = %d)\n", err);
goto fail_class_create;
}
err = platform_driver_register(&kpc_dma_plat_driver_i);
if (err){
pr_err("Can't register platform driver for kpc_dma (err = %d)\n", err);
goto fail_platdriver_register;
}
return err;
fail_platdriver_register:
class_destroy(kpc_dma_class);
fail_class_create:
......
drivers/staging/kpc2000/kpc_dma/kpc_dma_driver.h
View file @ 0f7aa9d2
......@@ -27,23 +27,23 @@ struct kpc_dma_device {
struct device *kpc_dma_dev;
struct kobject kobj;
char name[16];
int dir; // DMA_FROM_DEVICE || DMA_TO_DEVICE
struct mutex sem;
unsigned int irq;
struct work_struct irq_work;
atomic_t open_count;
size_t accumulated_bytes;
u32 accumulated_flags;
// Descriptor "Pool" housekeeping
u32 desc_pool_cnt;
struct dma_pool *desc_pool;
struct kpc_dma_descriptor *desc_pool_first;
struct kpc_dma_descriptor *desc_pool_last;
struct kpc_dma_descriptor *desc_next;
struct kpc_dma_descriptor *desc_completed;
};
......@@ -90,7 +90,7 @@ struct aio_cb_data {
unsigned char flags;
struct kiocb *kcb;
size_t len;
unsigned int page_count;
struct page **user_pages;
struct sg_table sgt;
......@@ -119,10 +119,10 @@ struct kpc_dma_descriptor {
volatile u32 DescSystemAddrLS;
volatile u32 DescSystemAddrMS;
volatile u32 DescNextDescPtr;
dma_addr_t MyDMAAddr;
struct kpc_dma_descriptor *Next;
struct aio_cb_data *acd;
} __attribute__((packed));
// DescControlFlags:
......
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