Commit 0faf5f95 authored by Lad Prabhakar's avatar Lad Prabhakar Committed by Geert Uytterhoeven

arm64: dts: renesas: r8a774e1: Add USB3.0 device nodes

Add usb3.0 phy, host and function device nodes on RZ/G2H SoC dtsi.
Signed-off-by: default avatarLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: default avatarMarian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1594919915-5225-11-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.comSigned-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent 92b2c276
......@@ -845,11 +845,16 @@ hsusb: usb@e6590000 {
};
usb3_phy0: usb-phy@e65ee000 {
compatible = "renesas,r8a774e1-usb3-phy",
"renesas,rcar-gen3-usb3-phy";
reg = <0 0xe65ee000 0 0x90>;
clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>,
<&usb_extal_clk>;
clock-names = "usb3-if", "usb3s_clk", "usb_extal";
power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
resets = <&cpg 328>;
#phy-cells = <0>;
status = "disabled";
/* placeholder */
};
dmac0: dma-controller@e6700000 {
......@@ -1392,17 +1397,25 @@ ssi2: ssi-2 {
};
xhci0: usb@ee000000 {
compatible = "renesas,xhci-r8a774e1",
"renesas,rcar-gen3-xhci";
reg = <0 0xee000000 0 0xc00>;
interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 328>;
power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
resets = <&cpg 328>;
status = "disabled";
/* placeholder */
};
usb3_peri0: usb@ee020000 {
compatible = "renesas,r8a774e1-usb3-peri",
"renesas,rcar-gen3-usb3-peri";
reg = <0 0xee020000 0 0x400>;
interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 328>;
power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
resets = <&cpg 328>;
status = "disabled";
/* placeholder */
};
ohci0: usb@ee080000 {
......
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