Commit 10a435ab authored by David S. Miller's avatar David S. Miller

Merge branch 'aquantia-next'

Igor Russkikh says:

====================
Aquantia atlantic driver update 2018/01

This patch is a set of cleanups and bugfixes in preparation to new
Aquantia hardware support.

Standard ARRAY_SIZE is now used through all the code,
some unused abstraction structures removed and cleaned up,
duplicate declarations removed.

Also two large declaration styling fixes:
- Hardware register set defines are lined up with kernel style
- Hardware access functions were not prefixed, now already
  defined hw_atl prefix is used.

patch v2 changes:
- patch reorganized because of its big size. New HW support
  will be submitted as a separate patchset.
====================
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 3b039b42 9ec03bf6
...@@ -16,7 +16,6 @@ ...@@ -16,7 +16,6 @@
#include <linux/pci.h> #include <linux/pci.h>
#include "ver.h" #include "ver.h"
#include "aq_nic.h"
#include "aq_cfg.h" #include "aq_cfg.h"
#include "aq_utils.h" #include "aq_utils.h"
......
...@@ -7,7 +7,7 @@ ...@@ -7,7 +7,7 @@
* version 2, as published by the Free Software Foundation. * version 2, as published by the Free Software Foundation.
*/ */
/* File aq_hw.h: Declaraion of abstract interface for NIC hardware specific /* File aq_hw.h: Declaration of abstract interface for NIC hardware specific
* functions. * functions.
*/ */
...@@ -15,6 +15,8 @@ ...@@ -15,6 +15,8 @@
#define AQ_HW_H #define AQ_HW_H
#include "aq_common.h" #include "aq_common.h"
#include "aq_rss.h"
#include "hw_atl/hw_atl_utils.h"
/* NIC H/W capabilities */ /* NIC H/W capabilities */
struct aq_hw_caps_s { struct aq_hw_caps_s {
...@@ -86,13 +88,33 @@ struct aq_stats_s { ...@@ -86,13 +88,33 @@ struct aq_stats_s {
#define AQ_HW_FLAG_ERRORS (AQ_HW_FLAG_ERR_HW | AQ_HW_FLAG_ERR_UNPLUG) #define AQ_HW_FLAG_ERRORS (AQ_HW_FLAG_ERR_HW | AQ_HW_FLAG_ERR_UNPLUG)
#define AQ_NIC_FLAGS_IS_NOT_READY (AQ_NIC_FLAG_STOPPING | \
AQ_NIC_FLAG_RESETTING | AQ_NIC_FLAG_CLOSING | \
AQ_NIC_FLAG_ERR_UNPLUG | AQ_NIC_FLAG_ERR_HW)
#define AQ_NIC_FLAGS_IS_NOT_TX_READY (AQ_NIC_FLAGS_IS_NOT_READY | \
AQ_NIC_LINK_DOWN)
struct aq_hw_s { struct aq_hw_s {
struct aq_obj_s header; atomic_t flags;
struct aq_nic_cfg_s *aq_nic_cfg; struct aq_nic_cfg_s *aq_nic_cfg;
struct aq_pci_func_s *aq_pci_func; struct aq_pci_func_s *aq_pci_func;
void __iomem *mmio; void __iomem *mmio;
unsigned int not_ff_addr; unsigned int not_ff_addr;
struct aq_hw_link_status_s aq_link_status; struct aq_hw_link_status_s aq_link_status;
struct hw_aq_atl_utils_mbox mbox;
struct hw_atl_stats_s last_stats;
struct aq_stats_s curr_stats;
u64 speed;
u32 itr_tx;
u32 itr_rx;
unsigned int chip_features;
u32 fw_ver_actual;
atomic_t dpc;
u32 mbox_addr;
u32 rpc_addr;
u32 rpc_tid;
struct hw_aq_atl_utils_fw_rpc rpc;
}; };
struct aq_ring_s; struct aq_ring_s;
...@@ -102,7 +124,7 @@ struct sk_buff; ...@@ -102,7 +124,7 @@ struct sk_buff;
struct aq_hw_ops { struct aq_hw_ops {
struct aq_hw_s *(*create)(struct aq_pci_func_s *aq_pci_func, struct aq_hw_s *(*create)(struct aq_pci_func_s *aq_pci_func,
unsigned int port, struct aq_hw_ops *ops); unsigned int port);
void (*destroy)(struct aq_hw_s *self); void (*destroy)(struct aq_hw_s *self);
...@@ -124,7 +146,6 @@ struct aq_hw_ops { ...@@ -124,7 +146,6 @@ struct aq_hw_ops {
struct aq_ring_s *aq_ring); struct aq_ring_s *aq_ring);
int (*hw_get_mac_permanent)(struct aq_hw_s *self, int (*hw_get_mac_permanent)(struct aq_hw_s *self,
struct aq_hw_caps_s *aq_hw_caps,
u8 *mac); u8 *mac);
int (*hw_set_mac_address)(struct aq_hw_s *self, u8 *mac_addr); int (*hw_set_mac_address)(struct aq_hw_s *self, u8 *mac_addr);
...@@ -135,8 +156,7 @@ struct aq_hw_ops { ...@@ -135,8 +156,7 @@ struct aq_hw_ops {
int (*hw_reset)(struct aq_hw_s *self); int (*hw_reset)(struct aq_hw_s *self);
int (*hw_init)(struct aq_hw_s *self, struct aq_nic_cfg_s *aq_nic_cfg, int (*hw_init)(struct aq_hw_s *self, u8 *mac_addr);
u8 *mac_addr);
int (*hw_start)(struct aq_hw_s *self); int (*hw_start)(struct aq_hw_s *self);
...@@ -184,7 +204,8 @@ struct aq_hw_ops { ...@@ -184,7 +204,8 @@ struct aq_hw_ops {
struct aq_rss_parameters *rss_params); struct aq_rss_parameters *rss_params);
int (*hw_get_regs)(struct aq_hw_s *self, int (*hw_get_regs)(struct aq_hw_s *self,
struct aq_hw_caps_s *aq_hw_caps, u32 *regs_buff); const struct aq_hw_caps_s *aq_hw_caps,
u32 *regs_buff);
int (*hw_update_stats)(struct aq_hw_s *self); int (*hw_update_stats)(struct aq_hw_s *self);
......
...@@ -40,7 +40,7 @@ u32 aq_hw_read_reg(struct aq_hw_s *hw, u32 reg) ...@@ -40,7 +40,7 @@ u32 aq_hw_read_reg(struct aq_hw_s *hw, u32 reg)
u32 value = readl(hw->mmio + reg); u32 value = readl(hw->mmio + reg);
if ((~0U) == value && (~0U) == readl(hw->mmio + hw->not_ff_addr)) if ((~0U) == value && (~0U) == readl(hw->mmio + hw->not_ff_addr))
aq_utils_obj_set(&hw->header.flags, AQ_HW_FLAG_ERR_UNPLUG); aq_utils_obj_set(&hw->flags, AQ_HW_FLAG_ERR_UNPLUG);
return value; return value;
} }
...@@ -54,11 +54,11 @@ int aq_hw_err_from_flags(struct aq_hw_s *hw) ...@@ -54,11 +54,11 @@ int aq_hw_err_from_flags(struct aq_hw_s *hw)
{ {
int err = 0; int err = 0;
if (aq_utils_obj_test(&hw->header.flags, AQ_HW_FLAG_ERR_UNPLUG)) { if (aq_utils_obj_test(&hw->flags, AQ_HW_FLAG_ERR_UNPLUG)) {
err = -ENXIO; err = -ENXIO;
goto err_exit; goto err_exit;
} }
if (aq_utils_obj_test(&hw->header.flags, AQ_HW_FLAG_ERR_HW)) { if (aq_utils_obj_test(&hw->flags, AQ_HW_FLAG_ERR_HW)) {
err = -EIO; err = -EIO;
goto err_exit; goto err_exit;
} }
......
...@@ -13,37 +13,32 @@ ...@@ -13,37 +13,32 @@
#include "aq_nic.h" #include "aq_nic.h"
#include "aq_pci_func.h" #include "aq_pci_func.h"
#include "aq_ethtool.h" #include "aq_ethtool.h"
#include "hw_atl/hw_atl_a0.h"
#include "hw_atl/hw_atl_b0.h"
#include <linux/netdevice.h> #include <linux/netdevice.h>
#include <linux/module.h> #include <linux/module.h>
static const struct pci_device_id aq_pci_tbl[] = {
{ PCI_VDEVICE(AQUANTIA, HW_ATL_DEVICE_ID_0001), },
{ PCI_VDEVICE(AQUANTIA, HW_ATL_DEVICE_ID_D100), },
{ PCI_VDEVICE(AQUANTIA, HW_ATL_DEVICE_ID_D107), },
{ PCI_VDEVICE(AQUANTIA, HW_ATL_DEVICE_ID_D108), },
{ PCI_VDEVICE(AQUANTIA, HW_ATL_DEVICE_ID_D109), },
{}
};
MODULE_DEVICE_TABLE(pci, aq_pci_tbl);
MODULE_LICENSE("GPL v2"); MODULE_LICENSE("GPL v2");
MODULE_VERSION(AQ_CFG_DRV_VERSION); MODULE_VERSION(AQ_CFG_DRV_VERSION);
MODULE_AUTHOR(AQ_CFG_DRV_AUTHOR); MODULE_AUTHOR(AQ_CFG_DRV_AUTHOR);
MODULE_DESCRIPTION(AQ_CFG_DRV_DESC); MODULE_DESCRIPTION(AQ_CFG_DRV_DESC);
static struct aq_hw_ops *aq_pci_probe_get_hw_ops_by_id(struct pci_dev *pdev) static const struct net_device_ops aq_ndev_ops;
struct net_device *aq_ndev_alloc(void)
{ {
struct aq_hw_ops *ops = NULL; struct net_device *ndev = NULL;
struct aq_nic_s *aq_nic = NULL;
ops = hw_atl_a0_get_ops_by_id(pdev); ndev = alloc_etherdev_mq(sizeof(struct aq_nic_s), AQ_CFG_VECS_MAX);
if (!ops) if (!ndev)
ops = hw_atl_b0_get_ops_by_id(pdev); return NULL;
return ops; aq_nic = netdev_priv(ndev);
aq_nic->ndev = ndev;
ndev->netdev_ops = &aq_ndev_ops;
ndev->ethtool_ops = &aq_ethtool_ops;
return ndev;
} }
static int aq_ndev_open(struct net_device *ndev) static int aq_ndev_open(struct net_device *ndev)
...@@ -170,66 +165,3 @@ static const struct net_device_ops aq_ndev_ops = { ...@@ -170,66 +165,3 @@ static const struct net_device_ops aq_ndev_ops = {
.ndo_set_mac_address = aq_ndev_set_mac_address, .ndo_set_mac_address = aq_ndev_set_mac_address,
.ndo_set_features = aq_ndev_set_features .ndo_set_features = aq_ndev_set_features
}; };
static int aq_pci_probe(struct pci_dev *pdev,
const struct pci_device_id *pci_id)
{
struct aq_hw_ops *aq_hw_ops = NULL;
struct aq_pci_func_s *aq_pci_func = NULL;
int err = 0;
err = pci_enable_device(pdev);
if (err < 0)
goto err_exit;
aq_hw_ops = aq_pci_probe_get_hw_ops_by_id(pdev);
aq_pci_func = aq_pci_func_alloc(aq_hw_ops, pdev,
&aq_ndev_ops, &aq_ethtool_ops);
if (!aq_pci_func) {
err = -ENOMEM;
goto err_exit;
}
err = aq_pci_func_init(aq_pci_func);
if (err < 0)
goto err_exit;
err_exit:
if (err < 0) {
if (aq_pci_func)
aq_pci_func_free(aq_pci_func);
}
return err;
}
static void aq_pci_remove(struct pci_dev *pdev)
{
struct aq_pci_func_s *aq_pci_func = pci_get_drvdata(pdev);
aq_pci_func_deinit(aq_pci_func);
aq_pci_func_free(aq_pci_func);
}
static int aq_pci_suspend(struct pci_dev *pdev, pm_message_t pm_msg)
{
struct aq_pci_func_s *aq_pci_func = pci_get_drvdata(pdev);
return aq_pci_func_change_pm_state(aq_pci_func, &pm_msg);
}
static int aq_pci_resume(struct pci_dev *pdev)
{
struct aq_pci_func_s *aq_pci_func = pci_get_drvdata(pdev);
pm_message_t pm_msg = PMSG_RESTORE;
return aq_pci_func_change_pm_state(aq_pci_func, &pm_msg);
}
static struct pci_driver aq_pci_ops = {
.name = AQ_CFG_DRV_NAME,
.id_table = aq_pci_tbl,
.probe = aq_pci_probe,
.remove = aq_pci_remove,
.suspend = aq_pci_suspend,
.resume = aq_pci_resume,
};
module_pci_driver(aq_pci_ops);
...@@ -14,4 +14,6 @@ ...@@ -14,4 +14,6 @@
#include "aq_common.h" #include "aq_common.h"
struct net_device *aq_ndev_alloc(void);
#endif /* AQ_MAIN_H */ #endif /* AQ_MAIN_H */
...@@ -14,7 +14,7 @@ ...@@ -14,7 +14,7 @@
#include "aq_vec.h" #include "aq_vec.h"
#include "aq_hw.h" #include "aq_hw.h"
#include "aq_pci_func.h" #include "aq_pci_func.h"
#include "aq_nic_internal.h" #include "aq_main.h"
#include <linux/moduleparam.h> #include <linux/moduleparam.h>
#include <linux/netdevice.h> #include <linux/netdevice.h>
...@@ -150,9 +150,9 @@ static int aq_nic_update_link_status(struct aq_nic_s *self) ...@@ -150,9 +150,9 @@ static int aq_nic_update_link_status(struct aq_nic_s *self)
self->link_status = self->aq_hw->aq_link_status; self->link_status = self->aq_hw->aq_link_status;
if (!netif_carrier_ok(self->ndev) && self->link_status.mbps) { if (!netif_carrier_ok(self->ndev) && self->link_status.mbps) {
aq_utils_obj_set(&self->header.flags, aq_utils_obj_set(&self->flags,
AQ_NIC_FLAG_STARTED); AQ_NIC_FLAG_STARTED);
aq_utils_obj_clear(&self->header.flags, aq_utils_obj_clear(&self->flags,
AQ_NIC_LINK_DOWN); AQ_NIC_LINK_DOWN);
netif_carrier_on(self->ndev); netif_carrier_on(self->ndev);
netif_tx_wake_all_queues(self->ndev); netif_tx_wake_all_queues(self->ndev);
...@@ -160,7 +160,7 @@ static int aq_nic_update_link_status(struct aq_nic_s *self) ...@@ -160,7 +160,7 @@ static int aq_nic_update_link_status(struct aq_nic_s *self)
if (netif_carrier_ok(self->ndev) && !self->link_status.mbps) { if (netif_carrier_ok(self->ndev) && !self->link_status.mbps) {
netif_carrier_off(self->ndev); netif_carrier_off(self->ndev);
netif_tx_disable(self->ndev); netif_tx_disable(self->ndev);
aq_utils_obj_set(&self->header.flags, AQ_NIC_LINK_DOWN); aq_utils_obj_set(&self->flags, AQ_NIC_LINK_DOWN);
} }
return 0; return 0;
} }
...@@ -171,7 +171,7 @@ static void aq_nic_service_timer_cb(struct timer_list *t) ...@@ -171,7 +171,7 @@ static void aq_nic_service_timer_cb(struct timer_list *t)
int ctimer = AQ_CFG_SERVICE_TIMER_INTERVAL; int ctimer = AQ_CFG_SERVICE_TIMER_INTERVAL;
int err = 0; int err = 0;
if (aq_utils_obj_test(&self->header.flags, AQ_NIC_FLAGS_IS_NOT_READY)) if (aq_utils_obj_test(&self->flags, AQ_NIC_FLAGS_IS_NOT_READY))
goto err_exit; goto err_exit;
err = aq_nic_update_link_status(self); err = aq_nic_update_link_status(self);
...@@ -205,14 +205,7 @@ static void aq_nic_polling_timer_cb(struct timer_list *t) ...@@ -205,14 +205,7 @@ static void aq_nic_polling_timer_cb(struct timer_list *t)
AQ_CFG_POLLING_TIMER_INTERVAL); AQ_CFG_POLLING_TIMER_INTERVAL);
} }
static struct net_device *aq_nic_ndev_alloc(void) struct aq_nic_s *aq_nic_alloc_cold(struct pci_dev *pdev,
{
return alloc_etherdev_mq(sizeof(struct aq_nic_s), AQ_CFG_VECS_MAX);
}
struct aq_nic_s *aq_nic_alloc_cold(const struct net_device_ops *ndev_ops,
const struct ethtool_ops *et_ops,
struct pci_dev *pdev,
struct aq_pci_func_s *aq_pci_func, struct aq_pci_func_s *aq_pci_func,
unsigned int port, unsigned int port,
const struct aq_hw_ops *aq_hw_ops) const struct aq_hw_ops *aq_hw_ops)
...@@ -221,7 +214,7 @@ struct aq_nic_s *aq_nic_alloc_cold(const struct net_device_ops *ndev_ops, ...@@ -221,7 +214,7 @@ struct aq_nic_s *aq_nic_alloc_cold(const struct net_device_ops *ndev_ops,
struct aq_nic_s *self = NULL; struct aq_nic_s *self = NULL;
int err = 0; int err = 0;
ndev = aq_nic_ndev_alloc(); ndev = aq_ndev_alloc();
if (!ndev) { if (!ndev) {
err = -ENOMEM; err = -ENOMEM;
goto err_exit; goto err_exit;
...@@ -229,9 +222,6 @@ struct aq_nic_s *aq_nic_alloc_cold(const struct net_device_ops *ndev_ops, ...@@ -229,9 +222,6 @@ struct aq_nic_s *aq_nic_alloc_cold(const struct net_device_ops *ndev_ops,
self = netdev_priv(ndev); self = netdev_priv(ndev);
ndev->netdev_ops = ndev_ops;
ndev->ethtool_ops = et_ops;
SET_NETDEV_DEV(ndev, &pdev->dev); SET_NETDEV_DEV(ndev, &pdev->dev);
ndev->if_port = port; ndev->if_port = port;
...@@ -242,8 +232,9 @@ struct aq_nic_s *aq_nic_alloc_cold(const struct net_device_ops *ndev_ops, ...@@ -242,8 +232,9 @@ struct aq_nic_s *aq_nic_alloc_cold(const struct net_device_ops *ndev_ops,
self->aq_hw_ops = *aq_hw_ops; self->aq_hw_ops = *aq_hw_ops;
self->port = (u8)port; self->port = (u8)port;
self->aq_hw = self->aq_hw_ops.create(aq_pci_func, self->port, self->aq_hw = self->aq_hw_ops.create(aq_pci_func, self->port);
&self->aq_hw_ops); self->aq_hw->aq_nic_cfg = &self->aq_nic_cfg;
err = self->aq_hw_ops.get_hw_caps(self->aq_hw, &self->aq_hw_caps, err = self->aq_hw_ops.get_hw_caps(self->aq_hw, &self->aq_hw_caps,
pdev->device, pdev->subsystem_device); pdev->device, pdev->subsystem_device);
if (err < 0) if (err < 0)
...@@ -268,7 +259,6 @@ int aq_nic_ndev_register(struct aq_nic_s *self) ...@@ -268,7 +259,6 @@ int aq_nic_ndev_register(struct aq_nic_s *self)
goto err_exit; goto err_exit;
} }
err = self->aq_hw_ops.hw_get_mac_permanent(self->aq_hw, err = self->aq_hw_ops.hw_get_mac_permanent(self->aq_hw,
self->aq_nic_cfg.aq_hw_caps,
self->ndev->dev_addr); self->ndev->dev_addr);
if (err < 0) if (err < 0)
goto err_exit; goto err_exit;
...@@ -295,7 +285,7 @@ int aq_nic_ndev_register(struct aq_nic_s *self) ...@@ -295,7 +285,7 @@ int aq_nic_ndev_register(struct aq_nic_s *self)
int aq_nic_ndev_init(struct aq_nic_s *self) int aq_nic_ndev_init(struct aq_nic_s *self)
{ {
struct aq_hw_caps_s *aq_hw_caps = self->aq_nic_cfg.aq_hw_caps; const struct aq_hw_caps_s *aq_hw_caps = self->aq_nic_cfg.aq_hw_caps;
struct aq_nic_cfg_s *aq_nic_cfg = &self->aq_nic_cfg; struct aq_nic_cfg_s *aq_nic_cfg = &self->aq_nic_cfg;
self->ndev->hw_features |= aq_hw_caps->hw_features; self->ndev->hw_features |= aq_hw_caps->hw_features;
...@@ -366,11 +356,6 @@ void aq_nic_set_tx_ring(struct aq_nic_s *self, unsigned int idx, ...@@ -366,11 +356,6 @@ void aq_nic_set_tx_ring(struct aq_nic_s *self, unsigned int idx,
self->aq_ring_tx[idx] = ring; self->aq_ring_tx[idx] = ring;
} }
struct device *aq_nic_get_dev(struct aq_nic_s *self)
{
return self->ndev->dev.parent;
}
struct net_device *aq_nic_get_ndev(struct aq_nic_s *self) struct net_device *aq_nic_get_ndev(struct aq_nic_s *self)
{ {
return self->ndev; return self->ndev;
...@@ -387,7 +372,7 @@ int aq_nic_init(struct aq_nic_s *self) ...@@ -387,7 +372,7 @@ int aq_nic_init(struct aq_nic_s *self)
if (err < 0) if (err < 0)
goto err_exit; goto err_exit;
err = self->aq_hw_ops.hw_init(self->aq_hw, &self->aq_nic_cfg, err = self->aq_hw_ops.hw_init(self->aq_hw,
aq_nic_get_ndev(self)->dev_addr); aq_nic_get_ndev(self)->dev_addr);
if (err < 0) if (err < 0)
goto err_exit; goto err_exit;
...@@ -992,7 +977,7 @@ void aq_nic_free_hot_resources(struct aq_nic_s *self) ...@@ -992,7 +977,7 @@ void aq_nic_free_hot_resources(struct aq_nic_s *self)
if (!self) if (!self)
goto err_exit; goto err_exit;
for (i = AQ_DIMOF(self->aq_vec); i--;) { for (i = ARRAY_SIZE(self->aq_vec); i--;) {
if (self->aq_vec[i]) { if (self->aq_vec[i]) {
aq_vec_free(self->aq_vec[i]); aq_vec_free(self->aq_vec[i]);
self->aq_vec[i] = NULL; self->aq_vec[i] = NULL;
......
...@@ -14,10 +14,13 @@ ...@@ -14,10 +14,13 @@
#include "aq_common.h" #include "aq_common.h"
#include "aq_rss.h" #include "aq_rss.h"
#include "aq_hw.h"
struct aq_ring_s; struct aq_ring_s;
struct aq_pci_func_s; struct aq_pci_func_s;
struct aq_hw_ops; struct aq_hw_ops;
struct aq_fw_s;
struct aq_vec_s;
#define AQ_NIC_FC_OFF 0U #define AQ_NIC_FC_OFF 0U
#define AQ_NIC_FC_TX 1U #define AQ_NIC_FC_TX 1U
...@@ -33,7 +36,7 @@ struct aq_hw_ops; ...@@ -33,7 +36,7 @@ struct aq_hw_ops;
#define AQ_NIC_RATE_100M BIT(5) #define AQ_NIC_RATE_100M BIT(5)
struct aq_nic_cfg_s { struct aq_nic_cfg_s {
struct aq_hw_caps_s *aq_hw_caps; const struct aq_hw_caps_s *aq_hw_caps;
u64 hw_features; u64 hw_features;
u32 rxds; /* rx ring size, descriptors # */ u32 rxds; /* rx ring size, descriptors # */
u32 txds; /* tx ring size, descriptors # */ u32 txds; /* tx ring size, descriptors # */
...@@ -44,7 +47,6 @@ struct aq_nic_cfg_s { ...@@ -44,7 +47,6 @@ struct aq_nic_cfg_s {
u16 tx_itr; u16 tx_itr;
u32 num_rss_queues; u32 num_rss_queues;
u32 mtu; u32 mtu;
u32 ucp_0x364;
u32 flow_control; u32 flow_control;
u32 link_speed_msk; u32 link_speed_msk;
u32 vlan_id; u32 vlan_id;
...@@ -69,9 +71,38 @@ struct aq_nic_cfg_s { ...@@ -69,9 +71,38 @@ struct aq_nic_cfg_s {
#define AQ_NIC_TCVEC2RING(_NIC_, _TC_, _VEC_) \ #define AQ_NIC_TCVEC2RING(_NIC_, _TC_, _VEC_) \
((_TC_) * AQ_CFG_TCS_MAX + (_VEC_)) ((_TC_) * AQ_CFG_TCS_MAX + (_VEC_))
struct aq_nic_s *aq_nic_alloc_cold(const struct net_device_ops *ndev_ops, struct aq_nic_s {
const struct ethtool_ops *et_ops, atomic_t flags;
struct pci_dev *pdev, struct aq_vec_s *aq_vec[AQ_CFG_VECS_MAX];
struct aq_ring_s *aq_ring_tx[AQ_CFG_VECS_MAX * AQ_CFG_TCS_MAX];
struct aq_hw_s *aq_hw;
struct net_device *ndev;
struct aq_pci_func_s *aq_pci_func;
unsigned int aq_vecs;
unsigned int packet_filter;
unsigned int power_state;
u8 port;
struct aq_hw_ops aq_hw_ops;
struct aq_hw_caps_s aq_hw_caps;
struct aq_nic_cfg_s aq_nic_cfg;
struct timer_list service_timer;
struct timer_list polling_timer;
struct aq_hw_link_status_s link_status;
struct {
u32 count;
u8 ar[AQ_CFG_MULTICAST_ADDRESS_MAX][ETH_ALEN];
} mc_list;
struct pci_dev *pdev;
unsigned int msix_entry_mask;
};
static inline struct device *aq_nic_get_dev(struct aq_nic_s *self)
{
return self->ndev->dev.parent;
}
struct aq_nic_s *aq_nic_alloc_cold(struct pci_dev *pdev,
struct aq_pci_func_s *aq_pci_func, struct aq_pci_func_s *aq_pci_func,
unsigned int port, unsigned int port,
const struct aq_hw_ops *aq_hw_ops); const struct aq_hw_ops *aq_hw_ops);
......
/*
* aQuantia Corporation Network Driver
* Copyright (C) 2014-2017 aQuantia Corporation. All rights reserved
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*/
/* File aq_nic_internal.h: Definition of private object structure. */
#ifndef AQ_NIC_INTERNAL_H
#define AQ_NIC_INTERNAL_H
struct aq_nic_s {
struct aq_obj_s header;
struct aq_vec_s *aq_vec[AQ_CFG_VECS_MAX];
struct aq_ring_s *aq_ring_tx[AQ_CFG_VECS_MAX * AQ_CFG_TCS_MAX];
struct aq_hw_s *aq_hw;
struct net_device *ndev;
struct aq_pci_func_s *aq_pci_func;
unsigned int aq_vecs;
unsigned int packet_filter;
unsigned int power_state;
u8 port;
struct aq_hw_ops aq_hw_ops;
struct aq_hw_caps_s aq_hw_caps;
struct aq_nic_cfg_s aq_nic_cfg;
struct timer_list service_timer;
struct timer_list polling_timer;
struct aq_hw_link_status_s link_status;
struct {
u32 count;
u8 ar[AQ_CFG_MULTICAST_ADDRESS_MAX][ETH_ALEN];
} mc_list;
};
#define AQ_NIC_FLAGS_IS_NOT_READY (AQ_NIC_FLAG_STOPPING | \
AQ_NIC_FLAG_RESETTING | AQ_NIC_FLAG_CLOSING | \
AQ_NIC_FLAG_ERR_UNPLUG | AQ_NIC_FLAG_ERR_HW)
#define AQ_NIC_FLAGS_IS_NOT_TX_READY (AQ_NIC_FLAGS_IS_NOT_READY | \
AQ_NIC_LINK_DOWN)
#endif /* AQ_NIC_INTERNAL_H */
...@@ -9,11 +9,15 @@ ...@@ -9,11 +9,15 @@
/* File aq_pci_func.c: Definition of PCI functions. */ /* File aq_pci_func.c: Definition of PCI functions. */
#include <linux/interrupt.h>
#include <linux/module.h>
#include "aq_pci_func.h" #include "aq_pci_func.h"
#include "aq_nic.h" #include "aq_nic.h"
#include "aq_vec.h" #include "aq_vec.h"
#include "aq_hw.h" #include "aq_hw.h"
#include <linux/interrupt.h> #include "hw_atl/hw_atl_a0.h"
#include "hw_atl/hw_atl_b0.h"
struct aq_pci_func_s { struct aq_pci_func_s {
struct pci_dev *pdev; struct pci_dev *pdev;
...@@ -29,10 +33,30 @@ struct aq_pci_func_s { ...@@ -29,10 +33,30 @@ struct aq_pci_func_s {
struct aq_hw_caps_s aq_hw_caps; struct aq_hw_caps_s aq_hw_caps;
}; };
struct aq_pci_func_s *aq_pci_func_alloc(struct aq_hw_ops *aq_hw_ops, static const struct pci_device_id aq_pci_tbl[] = {
struct pci_dev *pdev, { PCI_VDEVICE(AQUANTIA, HW_ATL_DEVICE_ID_0001), },
const struct net_device_ops *ndev_ops, { PCI_VDEVICE(AQUANTIA, HW_ATL_DEVICE_ID_D100), },
const struct ethtool_ops *eth_ops) { PCI_VDEVICE(AQUANTIA, HW_ATL_DEVICE_ID_D107), },
{ PCI_VDEVICE(AQUANTIA, HW_ATL_DEVICE_ID_D108), },
{ PCI_VDEVICE(AQUANTIA, HW_ATL_DEVICE_ID_D109), },
{}
};
MODULE_DEVICE_TABLE(pci, aq_pci_tbl);
static const struct aq_hw_ops *aq_pci_probe_get_hw_ops_by_id(struct pci_dev *pdev)
{
const struct aq_hw_ops *ops = NULL;
ops = hw_atl_a0_get_ops_by_id(pdev);
if (!ops)
ops = hw_atl_b0_get_ops_by_id(pdev);
return ops;
}
struct aq_pci_func_s *aq_pci_func_alloc(const struct aq_hw_ops *aq_hw_ops,
struct pci_dev *pdev)
{ {
struct aq_pci_func_s *self = NULL; struct aq_pci_func_s *self = NULL;
int err = 0; int err = 0;
...@@ -59,8 +83,7 @@ struct aq_pci_func_s *aq_pci_func_alloc(struct aq_hw_ops *aq_hw_ops, ...@@ -59,8 +83,7 @@ struct aq_pci_func_s *aq_pci_func_alloc(struct aq_hw_ops *aq_hw_ops,
self->ports = self->aq_hw_caps.ports; self->ports = self->aq_hw_caps.ports;
for (port = 0; port < self->ports; ++port) { for (port = 0; port < self->ports; ++port) {
struct aq_nic_s *aq_nic = aq_nic_alloc_cold(ndev_ops, eth_ops, struct aq_nic_s *aq_nic = aq_nic_alloc_cold(pdev, self,
pdev, self,
port, aq_hw_ops); port, aq_hw_ops);
if (!aq_nic) { if (!aq_nic) {
...@@ -297,3 +320,65 @@ int aq_pci_func_change_pm_state(struct aq_pci_func_s *self, ...@@ -297,3 +320,65 @@ int aq_pci_func_change_pm_state(struct aq_pci_func_s *self,
err_exit: err_exit:
return err; return err;
} }
static int aq_pci_probe(struct pci_dev *pdev,
const struct pci_device_id *pci_id)
{
const struct aq_hw_ops *aq_hw_ops = NULL;
struct aq_pci_func_s *aq_pci_func = NULL;
int err = 0;
err = pci_enable_device(pdev);
if (err < 0)
goto err_exit;
aq_hw_ops = aq_pci_probe_get_hw_ops_by_id(pdev);
aq_pci_func = aq_pci_func_alloc(aq_hw_ops, pdev);
if (!aq_pci_func) {
err = -ENOMEM;
goto err_exit;
}
err = aq_pci_func_init(aq_pci_func);
if (err < 0)
goto err_exit;
err_exit:
if (err < 0) {
if (aq_pci_func)
aq_pci_func_free(aq_pci_func);
}
return err;
}
static void aq_pci_remove(struct pci_dev *pdev)
{
struct aq_pci_func_s *aq_pci_func = pci_get_drvdata(pdev);
aq_pci_func_deinit(aq_pci_func);
aq_pci_func_free(aq_pci_func);
}
static int aq_pci_suspend(struct pci_dev *pdev, pm_message_t pm_msg)
{
struct aq_pci_func_s *aq_pci_func = pci_get_drvdata(pdev);
return aq_pci_func_change_pm_state(aq_pci_func, &pm_msg);
}
static int aq_pci_resume(struct pci_dev *pdev)
{
struct aq_pci_func_s *aq_pci_func = pci_get_drvdata(pdev);
pm_message_t pm_msg = PMSG_RESTORE;
return aq_pci_func_change_pm_state(aq_pci_func, &pm_msg);
}
static struct pci_driver aq_pci_ops = {
.name = AQ_CFG_DRV_NAME,
.id_table = aq_pci_tbl,
.probe = aq_pci_probe,
.remove = aq_pci_remove,
.suspend = aq_pci_suspend,
.resume = aq_pci_resume,
};
module_pci_driver(aq_pci_ops);
...@@ -13,11 +13,10 @@ ...@@ -13,11 +13,10 @@
#define AQ_PCI_FUNC_H #define AQ_PCI_FUNC_H
#include "aq_common.h" #include "aq_common.h"
#include "aq_nic.h"
struct aq_pci_func_s *aq_pci_func_alloc(struct aq_hw_ops *hw_ops, struct aq_pci_func_s *aq_pci_func_alloc(const struct aq_hw_ops *hw_ops,
struct pci_dev *pdev, struct pci_dev *pdev);
const struct net_device_ops *ndev_ops,
const struct ethtool_ops *eth_ops);
int aq_pci_func_init(struct aq_pci_func_s *self); int aq_pci_func_init(struct aq_pci_func_s *self);
int aq_pci_func_alloc_irq(struct aq_pci_func_s *self, unsigned int i, int aq_pci_func_alloc_irq(struct aq_pci_func_s *self, unsigned int i,
char *name, void *aq_vec, char *name, void *aq_vec,
......
...@@ -279,10 +279,10 @@ int aq_ring_rx_clean(struct aq_ring_s *self, ...@@ -279,10 +279,10 @@ int aq_ring_rx_clean(struct aq_ring_s *self,
skb_record_rx_queue(skb, self->idx); skb_record_rx_queue(skb, self->idx);
napi_gro_receive(napi, skb);
++self->stats.rx.packets; ++self->stats.rx.packets;
self->stats.rx.bytes += skb->len; self->stats.rx.bytes += skb->len;
napi_gro_receive(napi, skb);
} }
err_exit: err_exit:
......
...@@ -15,6 +15,7 @@ ...@@ -15,6 +15,7 @@
#include "aq_common.h" #include "aq_common.h"
struct page; struct page;
struct aq_nic_cfg_s;
/* TxC SOP DX EOP /* TxC SOP DX EOP
* +----------+----------+----------+----------- * +----------+----------+----------+-----------
...@@ -105,7 +106,6 @@ union aq_ring_stats_s { ...@@ -105,7 +106,6 @@ union aq_ring_stats_s {
}; };
struct aq_ring_s { struct aq_ring_s {
struct aq_obj_s header;
struct aq_ring_buff_s *buff_ring; struct aq_ring_buff_s *buff_ring;
u8 *dx_ring; /* descriptors ring, dma shared mem */ u8 *dx_ring; /* descriptors ring, dma shared mem */
struct aq_nic_s *aq_nic; struct aq_nic_s *aq_nic;
......
...@@ -14,12 +14,6 @@ ...@@ -14,12 +14,6 @@
#include "aq_common.h" #include "aq_common.h"
#define AQ_DIMOF(_ARY_) ARRAY_SIZE(_ARY_)
struct aq_obj_s {
atomic_t flags;
};
static inline void aq_utils_obj_set(atomic_t *flags, u32 mask) static inline void aq_utils_obj_set(atomic_t *flags, u32 mask)
{ {
unsigned long flags_old, flags_new; unsigned long flags_old, flags_new;
......
...@@ -19,8 +19,7 @@ ...@@ -19,8 +19,7 @@
#include <linux/netdevice.h> #include <linux/netdevice.h>
struct aq_vec_s { struct aq_vec_s {
struct aq_obj_s header; const struct aq_hw_ops *aq_hw_ops;
struct aq_hw_ops *aq_hw_ops;
struct aq_hw_s *aq_hw; struct aq_hw_s *aq_hw;
struct aq_nic_s *aq_nic; struct aq_nic_s *aq_nic;
unsigned int tx_rings; unsigned int tx_rings;
...@@ -166,7 +165,7 @@ struct aq_vec_s *aq_vec_alloc(struct aq_nic_s *aq_nic, unsigned int idx, ...@@ -166,7 +165,7 @@ struct aq_vec_s *aq_vec_alloc(struct aq_nic_s *aq_nic, unsigned int idx,
return self; return self;
} }
int aq_vec_init(struct aq_vec_s *self, struct aq_hw_ops *aq_hw_ops, int aq_vec_init(struct aq_vec_s *self, const struct aq_hw_ops *aq_hw_ops,
struct aq_hw_s *aq_hw) struct aq_hw_s *aq_hw)
{ {
struct aq_ring_s *ring = NULL; struct aq_ring_s *ring = NULL;
......
...@@ -19,6 +19,8 @@ ...@@ -19,6 +19,8 @@
struct aq_hw_s; struct aq_hw_s;
struct aq_hw_ops; struct aq_hw_ops;
struct aq_nic_s;
struct aq_nic_cfg_s;
struct aq_ring_stats_rx_s; struct aq_ring_stats_rx_s;
struct aq_ring_stats_tx_s; struct aq_ring_stats_tx_s;
...@@ -26,7 +28,7 @@ irqreturn_t aq_vec_isr(int irq, void *private); ...@@ -26,7 +28,7 @@ irqreturn_t aq_vec_isr(int irq, void *private);
irqreturn_t aq_vec_isr_legacy(int irq, void *private); irqreturn_t aq_vec_isr_legacy(int irq, void *private);
struct aq_vec_s *aq_vec_alloc(struct aq_nic_s *aq_nic, unsigned int idx, struct aq_vec_s *aq_vec_alloc(struct aq_nic_s *aq_nic, unsigned int idx,
struct aq_nic_cfg_s *aq_nic_cfg); struct aq_nic_cfg_s *aq_nic_cfg);
int aq_vec_init(struct aq_vec_s *self, struct aq_hw_ops *aq_hw_ops, int aq_vec_init(struct aq_vec_s *self, const struct aq_hw_ops *aq_hw_ops,
struct aq_hw_s *aq_hw); struct aq_hw_s *aq_hw);
void aq_vec_deinit(struct aq_vec_s *self); void aq_vec_deinit(struct aq_vec_s *self);
void aq_vec_free(struct aq_vec_s *self); void aq_vec_free(struct aq_vec_s *self);
......
...@@ -29,6 +29,6 @@ ...@@ -29,6 +29,6 @@
#endif #endif
struct aq_hw_ops *hw_atl_a0_get_ops_by_id(struct pci_dev *pdev); const struct aq_hw_ops *hw_atl_a0_get_ops_by_id(struct pci_dev *pdev);
#endif /* HW_ATL_A0_H */ #endif /* HW_ATL_A0_H */
...@@ -88,37 +88,6 @@ ...@@ -88,37 +88,6 @@
#define HW_ATL_A0_FW_VER_EXPECTED 0x01050006U #define HW_ATL_A0_FW_VER_EXPECTED 0x01050006U
/* Hardware tx descriptor */
struct __packed hw_atl_txd_s {
u64 buf_addr;
u32 ctl;
u32 ctl2; /* 63..46 - payload length, 45 - ctx enable, 44 - ctx index */
};
/* Hardware tx context descriptor */
struct __packed hw_atl_txc_s {
u32 rsvd;
u32 len;
u32 ctl;
u32 len2;
};
/* Hardware rx descriptor */
struct __packed hw_atl_rxd_s {
u64 buf_addr;
u64 hdr_addr;
};
/* Hardware rx descriptor writeback */
struct __packed hw_atl_rxd_wb_s {
u32 type;
u32 rss_hash;
u16 status;
u16 pkt_len;
u16 next_desc_ptr;
u16 vlan;
};
/* HW layer capabilities */ /* HW layer capabilities */
static struct aq_hw_caps_s hw_atl_a0_hw_caps_ = { static struct aq_hw_caps_s hw_atl_a0_hw_caps_ = {
.ports = 1U, .ports = 1U,
......
...@@ -29,6 +29,6 @@ ...@@ -29,6 +29,6 @@
#endif #endif
struct aq_hw_ops *hw_atl_b0_get_ops_by_id(struct pci_dev *pdev); const struct aq_hw_ops *hw_atl_b0_get_ops_by_id(struct pci_dev *pdev);
#endif /* HW_ATL_B0_H */ #endif /* HW_ATL_B0_H */
...@@ -142,37 +142,6 @@ ...@@ -142,37 +142,6 @@
#define HW_ATL_INTR_MODER_MAX 0x1FF #define HW_ATL_INTR_MODER_MAX 0x1FF
#define HW_ATL_INTR_MODER_MIN 0xFF #define HW_ATL_INTR_MODER_MIN 0xFF
/* Hardware tx descriptor */
struct __packed hw_atl_txd_s {
u64 buf_addr;
u32 ctl;
u32 ctl2; /* 63..46 - payload length, 45 - ctx enable, 44 - ctx index */
};
/* Hardware tx context descriptor */
struct __packed hw_atl_txc_s {
u32 rsvd;
u32 len;
u32 ctl;
u32 len2;
};
/* Hardware rx descriptor */
struct __packed hw_atl_rxd_s {
u64 buf_addr;
u64 hdr_addr;
};
/* Hardware rx descriptor writeback */
struct __packed hw_atl_rxd_wb_s {
u32 type;
u32 rss_hash;
u16 status;
u16 pkt_len;
u16 next_desc_ptr;
u16 vlan;
};
/* HW layer capabilities */ /* HW layer capabilities */
static struct aq_hw_caps_s hw_atl_b0_hw_caps_ = { static struct aq_hw_caps_s hw_atl_b0_hw_caps_ = {
.ports = 1U, .ports = 1U,
......
...@@ -11,11 +11,9 @@ ...@@ -11,11 +11,9 @@
* abstraction layer. * abstraction layer.
*/ */
#include "../aq_hw.h" #include "../aq_nic.h"
#include "../aq_hw_utils.h" #include "../aq_hw_utils.h"
#include "../aq_pci_func.h" #include "../aq_pci_func.h"
#include "../aq_ring.h"
#include "../aq_vec.h"
#include "hw_atl_utils.h" #include "hw_atl_utils.h"
#include "hw_atl_llh.h" #include "hw_atl_llh.h"
...@@ -37,15 +35,15 @@ static int hw_atl_utils_fw_downld_dwords(struct aq_hw_s *self, u32 a, ...@@ -37,15 +35,15 @@ static int hw_atl_utils_fw_downld_dwords(struct aq_hw_s *self, u32 a,
{ {
int err = 0; int err = 0;
AQ_HW_WAIT_FOR(reg_glb_cpu_sem_get(self, AQ_HW_WAIT_FOR(hw_atl_reg_glb_cpu_sem_get(self,
HW_ATL_FW_SM_RAM) == 1U, HW_ATL_FW_SM_RAM) == 1U,
1U, 10000U); 1U, 10000U);
if (err < 0) { if (err < 0) {
bool is_locked; bool is_locked;
reg_glb_cpu_sem_set(self, 1U, HW_ATL_FW_SM_RAM); hw_atl_reg_glb_cpu_sem_set(self, 1U, HW_ATL_FW_SM_RAM);
is_locked = reg_glb_cpu_sem_get(self, HW_ATL_FW_SM_RAM); is_locked = hw_atl_reg_glb_cpu_sem_get(self, HW_ATL_FW_SM_RAM);
if (!is_locked) { if (!is_locked) {
err = -ETIME; err = -ETIME;
goto err_exit; goto err_exit;
...@@ -66,7 +64,7 @@ static int hw_atl_utils_fw_downld_dwords(struct aq_hw_s *self, u32 a, ...@@ -66,7 +64,7 @@ static int hw_atl_utils_fw_downld_dwords(struct aq_hw_s *self, u32 a,
*(p++) = aq_hw_read_reg(self, 0x0000020CU); *(p++) = aq_hw_read_reg(self, 0x0000020CU);
} }
reg_glb_cpu_sem_set(self, 1U, HW_ATL_FW_SM_RAM); hw_atl_reg_glb_cpu_sem_set(self, 1U, HW_ATL_FW_SM_RAM);
err_exit: err_exit:
return err; return err;
...@@ -78,7 +76,7 @@ static int hw_atl_utils_fw_upload_dwords(struct aq_hw_s *self, u32 a, u32 *p, ...@@ -78,7 +76,7 @@ static int hw_atl_utils_fw_upload_dwords(struct aq_hw_s *self, u32 a, u32 *p,
int err = 0; int err = 0;
bool is_locked; bool is_locked;
is_locked = reg_glb_cpu_sem_get(self, HW_ATL_FW_SM_RAM); is_locked = hw_atl_reg_glb_cpu_sem_get(self, HW_ATL_FW_SM_RAM);
if (!is_locked) { if (!is_locked) {
err = -ETIME; err = -ETIME;
goto err_exit; goto err_exit;
...@@ -97,7 +95,7 @@ static int hw_atl_utils_fw_upload_dwords(struct aq_hw_s *self, u32 a, u32 *p, ...@@ -97,7 +95,7 @@ static int hw_atl_utils_fw_upload_dwords(struct aq_hw_s *self, u32 a, u32 *p,
} }
} }
reg_glb_cpu_sem_set(self, 1U, HW_ATL_FW_SM_RAM); hw_atl_reg_glb_cpu_sem_set(self, 1U, HW_ATL_FW_SM_RAM);
err_exit: err_exit:
return err; return err;
...@@ -119,7 +117,7 @@ static int hw_atl_utils_ver_match(u32 ver_expected, u32 ver_actual) ...@@ -119,7 +117,7 @@ static int hw_atl_utils_ver_match(u32 ver_expected, u32 ver_actual)
} }
static int hw_atl_utils_init_ucp(struct aq_hw_s *self, static int hw_atl_utils_init_ucp(struct aq_hw_s *self,
struct aq_hw_caps_s *aq_hw_caps) const struct aq_hw_caps_s *aq_hw_caps)
{ {
int err = 0; int err = 0;
...@@ -133,10 +131,10 @@ static int hw_atl_utils_init_ucp(struct aq_hw_s *self, ...@@ -133,10 +131,10 @@ static int hw_atl_utils_init_ucp(struct aq_hw_s *self,
aq_hw_write_reg(self, HW_ATL_UCP_0X370_REG, ucp_0x370); aq_hw_write_reg(self, HW_ATL_UCP_0X370_REG, ucp_0x370);
} }
reg_glb_cpu_scratch_scp_set(self, 0x00000000U, 25U); hw_atl_reg_glb_cpu_scratch_scp_set(self, 0x00000000U, 25U);
/* check 10 times by 1ms */ /* check 10 times by 1ms */
AQ_HW_WAIT_FOR(0U != (PHAL_ATLANTIC_A0->mbox_addr = AQ_HW_WAIT_FOR(0U != (self->mbox_addr =
aq_hw_read_reg(self, 0x360U)), 1000U, 10U); aq_hw_read_reg(self, 0x360U)), 1000U, 10U);
err = hw_atl_utils_ver_match(aq_hw_caps->fw_ver_expected, err = hw_atl_utils_ver_match(aq_hw_caps->fw_ver_expected,
...@@ -174,14 +172,14 @@ static int hw_atl_utils_fw_rpc_call(struct aq_hw_s *self, unsigned int rpc_size) ...@@ -174,14 +172,14 @@ static int hw_atl_utils_fw_rpc_call(struct aq_hw_s *self, unsigned int rpc_size)
err = -1; err = -1;
goto err_exit; goto err_exit;
} }
err = hw_atl_utils_fw_upload_dwords(self, PHAL_ATLANTIC->rpc_addr, err = hw_atl_utils_fw_upload_dwords(self, self->rpc_addr,
(u32 *)(void *)&PHAL_ATLANTIC->rpc, (u32 *)(void *)&self->rpc,
(rpc_size + sizeof(u32) - (rpc_size + sizeof(u32) -
sizeof(u8)) / sizeof(u32)); sizeof(u8)) / sizeof(u32));
if (err < 0) if (err < 0)
goto err_exit; goto err_exit;
sw.tid = 0xFFFFU & (++PHAL_ATLANTIC->rpc_tid); sw.tid = 0xFFFFU & (++self->rpc_tid);
sw.len = (u16)rpc_size; sw.len = (u16)rpc_size;
aq_hw_write_reg(self, HW_ATL_RPC_CONTROL_ADR, sw.val); aq_hw_write_reg(self, HW_ATL_RPC_CONTROL_ADR, sw.val);
...@@ -199,7 +197,7 @@ static int hw_atl_utils_fw_rpc_wait(struct aq_hw_s *self, ...@@ -199,7 +197,7 @@ static int hw_atl_utils_fw_rpc_wait(struct aq_hw_s *self,
do { do {
sw.val = aq_hw_read_reg(self, HW_ATL_RPC_CONTROL_ADR); sw.val = aq_hw_read_reg(self, HW_ATL_RPC_CONTROL_ADR);
PHAL_ATLANTIC->rpc_tid = sw.tid; self->rpc_tid = sw.tid;
AQ_HW_WAIT_FOR(sw.tid == AQ_HW_WAIT_FOR(sw.tid ==
(fw.val = (fw.val =
...@@ -221,9 +219,9 @@ static int hw_atl_utils_fw_rpc_wait(struct aq_hw_s *self, ...@@ -221,9 +219,9 @@ static int hw_atl_utils_fw_rpc_wait(struct aq_hw_s *self,
if (fw.len) { if (fw.len) {
err = err =
hw_atl_utils_fw_downld_dwords(self, hw_atl_utils_fw_downld_dwords(self,
PHAL_ATLANTIC->rpc_addr, self->rpc_addr,
(u32 *)(void *) (u32 *)(void *)
&PHAL_ATLANTIC->rpc, &self->rpc,
(fw.len + sizeof(u32) - (fw.len + sizeof(u32) -
sizeof(u8)) / sizeof(u8)) /
sizeof(u32)); sizeof(u32));
...@@ -231,19 +229,18 @@ static int hw_atl_utils_fw_rpc_wait(struct aq_hw_s *self, ...@@ -231,19 +229,18 @@ static int hw_atl_utils_fw_rpc_wait(struct aq_hw_s *self,
goto err_exit; goto err_exit;
} }
*rpc = &PHAL_ATLANTIC->rpc; *rpc = &self->rpc;
} }
err_exit: err_exit:
return err; return err;
} }
static int hw_atl_utils_mpi_create(struct aq_hw_s *self, static int hw_atl_utils_mpi_create(struct aq_hw_s *self)
struct aq_hw_caps_s *aq_hw_caps)
{ {
int err = 0; int err = 0;
err = hw_atl_utils_init_ucp(self, aq_hw_caps); err = hw_atl_utils_init_ucp(self, self->aq_nic_cfg->aq_hw_caps);
if (err < 0) if (err < 0)
goto err_exit; goto err_exit;
...@@ -259,7 +256,7 @@ int hw_atl_utils_mpi_read_mbox(struct aq_hw_s *self, ...@@ -259,7 +256,7 @@ int hw_atl_utils_mpi_read_mbox(struct aq_hw_s *self,
struct hw_aq_atl_utils_mbox_header *pmbox) struct hw_aq_atl_utils_mbox_header *pmbox)
{ {
return hw_atl_utils_fw_downld_dwords(self, return hw_atl_utils_fw_downld_dwords(self,
PHAL_ATLANTIC->mbox_addr, self->mbox_addr,
(u32 *)(void *)pmbox, (u32 *)(void *)pmbox,
sizeof(*pmbox) / sizeof(u32)); sizeof(*pmbox) / sizeof(u32));
} }
...@@ -270,7 +267,7 @@ void hw_atl_utils_mpi_read_stats(struct aq_hw_s *self, ...@@ -270,7 +267,7 @@ void hw_atl_utils_mpi_read_stats(struct aq_hw_s *self,
int err = 0; int err = 0;
err = hw_atl_utils_fw_downld_dwords(self, err = hw_atl_utils_fw_downld_dwords(self,
PHAL_ATLANTIC->mbox_addr, self->mbox_addr,
(u32 *)(void *)pmbox, (u32 *)(void *)pmbox,
sizeof(*pmbox) / sizeof(u32)); sizeof(*pmbox) / sizeof(u32));
if (err < 0) if (err < 0)
...@@ -281,9 +278,9 @@ void hw_atl_utils_mpi_read_stats(struct aq_hw_s *self, ...@@ -281,9 +278,9 @@ void hw_atl_utils_mpi_read_stats(struct aq_hw_s *self,
self->aq_nic_cfg->mtu : 1514U; self->aq_nic_cfg->mtu : 1514U;
pmbox->stats.ubrc = pmbox->stats.uprc * mtu; pmbox->stats.ubrc = pmbox->stats.uprc * mtu;
pmbox->stats.ubtc = pmbox->stats.uptc * mtu; pmbox->stats.ubtc = pmbox->stats.uptc * mtu;
pmbox->stats.dpc = atomic_read(&PHAL_ATLANTIC_A0->dpc); pmbox->stats.dpc = atomic_read(&self->dpc);
} else { } else {
pmbox->stats.dpc = reg_rx_dma_stat_counter7get(self); pmbox->stats.dpc = hw_atl_reg_rx_dma_stat_counter7get(self);
} }
err_exit:; err_exit:;
...@@ -365,7 +362,6 @@ int hw_atl_utils_mpi_get_link_status(struct aq_hw_s *self) ...@@ -365,7 +362,6 @@ int hw_atl_utils_mpi_get_link_status(struct aq_hw_s *self)
} }
int hw_atl_utils_get_mac_permanent(struct aq_hw_s *self, int hw_atl_utils_get_mac_permanent(struct aq_hw_s *self,
struct aq_hw_caps_s *aq_hw_caps,
u8 *mac) u8 *mac)
{ {
int err = 0; int err = 0;
...@@ -376,9 +372,9 @@ int hw_atl_utils_get_mac_permanent(struct aq_hw_s *self, ...@@ -376,9 +372,9 @@ int hw_atl_utils_get_mac_permanent(struct aq_hw_s *self,
self->mmio = aq_pci_func_get_mmio(self->aq_pci_func); self->mmio = aq_pci_func_get_mmio(self->aq_pci_func);
hw_atl_utils_hw_chip_features_init(self, hw_atl_utils_hw_chip_features_init(self,
&PHAL_ATLANTIC_A0->chip_features); &self->chip_features);
err = hw_atl_utils_mpi_create(self, aq_hw_caps); err = hw_atl_utils_mpi_create(self);
if (err < 0) if (err < 0)
goto err_exit; goto err_exit;
...@@ -396,7 +392,7 @@ int hw_atl_utils_get_mac_permanent(struct aq_hw_s *self, ...@@ -396,7 +392,7 @@ int hw_atl_utils_get_mac_permanent(struct aq_hw_s *self,
aq_hw_read_reg(self, 0x00000374U) + aq_hw_read_reg(self, 0x00000374U) +
(40U * 4U), (40U * 4U),
mac_addr, mac_addr,
AQ_DIMOF(mac_addr)); ARRAY_SIZE(mac_addr));
if (err < 0) { if (err < 0) {
mac_addr[0] = 0U; mac_addr[0] = 0U;
mac_addr[1] = 0U; mac_addr[1] = 0U;
...@@ -465,7 +461,7 @@ unsigned int hw_atl_utils_mbps_2_speed_index(unsigned int mbps) ...@@ -465,7 +461,7 @@ unsigned int hw_atl_utils_mbps_2_speed_index(unsigned int mbps)
void hw_atl_utils_hw_chip_features_init(struct aq_hw_s *self, u32 *p) void hw_atl_utils_hw_chip_features_init(struct aq_hw_s *self, u32 *p)
{ {
u32 chip_features = 0U; u32 chip_features = 0U;
u32 val = reg_glb_mif_id_get(self); u32 val = hw_atl_reg_glb_mif_id_get(self);
u32 mif_rev = val & 0xFFU; u32 mif_rev = val & 0xFFU;
if ((3U & mif_rev) == 1U) { if ((3U & mif_rev) == 1U) {
...@@ -500,13 +496,13 @@ int hw_atl_utils_hw_set_power(struct aq_hw_s *self, ...@@ -500,13 +496,13 @@ int hw_atl_utils_hw_set_power(struct aq_hw_s *self,
int hw_atl_utils_update_stats(struct aq_hw_s *self) int hw_atl_utils_update_stats(struct aq_hw_s *self)
{ {
struct hw_atl_s *hw_self = PHAL_ATLANTIC;
struct hw_aq_atl_utils_mbox mbox; struct hw_aq_atl_utils_mbox mbox;
hw_atl_utils_mpi_read_stats(self, &mbox); hw_atl_utils_mpi_read_stats(self, &mbox);
#define AQ_SDELTA(_N_) (hw_self->curr_stats._N_ += \ #define AQ_SDELTA(_N_) (self->curr_stats._N_ += \
mbox.stats._N_ - hw_self->last_stats._N_) mbox.stats._N_ - self->last_stats._N_)
if (self->aq_link_status.mbps) { if (self->aq_link_status.mbps) {
AQ_SDELTA(uprc); AQ_SDELTA(uprc);
AQ_SDELTA(mprc); AQ_SDELTA(mprc);
...@@ -527,19 +523,19 @@ int hw_atl_utils_update_stats(struct aq_hw_s *self) ...@@ -527,19 +523,19 @@ int hw_atl_utils_update_stats(struct aq_hw_s *self)
AQ_SDELTA(dpc); AQ_SDELTA(dpc);
} }
#undef AQ_SDELTA #undef AQ_SDELTA
hw_self->curr_stats.dma_pkt_rc = stats_rx_dma_good_pkt_counterlsw_get(self); self->curr_stats.dma_pkt_rc = hw_atl_stats_rx_dma_good_pkt_counterlsw_get(self);
hw_self->curr_stats.dma_pkt_tc = stats_tx_dma_good_pkt_counterlsw_get(self); self->curr_stats.dma_pkt_tc = hw_atl_stats_tx_dma_good_pkt_counterlsw_get(self);
hw_self->curr_stats.dma_oct_rc = stats_rx_dma_good_octet_counterlsw_get(self); self->curr_stats.dma_oct_rc = hw_atl_stats_rx_dma_good_octet_counterlsw_get(self);
hw_self->curr_stats.dma_oct_tc = stats_tx_dma_good_octet_counterlsw_get(self); self->curr_stats.dma_oct_tc = hw_atl_stats_tx_dma_good_octet_counterlsw_get(self);
memcpy(&hw_self->last_stats, &mbox.stats, sizeof(mbox.stats)); memcpy(&self->last_stats, &mbox.stats, sizeof(mbox.stats));
return 0; return 0;
} }
struct aq_stats_s *hw_atl_utils_get_hw_stats(struct aq_hw_s *self) struct aq_stats_s *hw_atl_utils_get_hw_stats(struct aq_hw_s *self)
{ {
return &PHAL_ATLANTIC->curr_stats; return &self->curr_stats;
} }
static const u32 hw_atl_utils_hw_mac_regs[] = { static const u32 hw_atl_utils_hw_mac_regs[] = {
...@@ -568,7 +564,7 @@ static const u32 hw_atl_utils_hw_mac_regs[] = { ...@@ -568,7 +564,7 @@ static const u32 hw_atl_utils_hw_mac_regs[] = {
}; };
int hw_atl_utils_hw_get_regs(struct aq_hw_s *self, int hw_atl_utils_hw_get_regs(struct aq_hw_s *self,
struct aq_hw_caps_s *aq_hw_caps, const struct aq_hw_caps_s *aq_hw_caps,
u32 *regs_buff) u32 *regs_buff)
{ {
unsigned int i = 0U; unsigned int i = 0U;
......
...@@ -14,10 +14,39 @@ ...@@ -14,10 +14,39 @@
#ifndef HW_ATL_UTILS_H #ifndef HW_ATL_UTILS_H
#define HW_ATL_UTILS_H #define HW_ATL_UTILS_H
#include "../aq_common.h"
#define HW_ATL_FLUSH() { (void)aq_hw_read_reg(self, 0x10); } #define HW_ATL_FLUSH() { (void)aq_hw_read_reg(self, 0x10); }
/* Hardware tx descriptor */
struct __packed hw_atl_txd_s {
u64 buf_addr;
u32 ctl;
u32 ctl2; /* 63..46 - payload length, 45 - ctx enable, 44 - ctx index */
};
/* Hardware tx context descriptor */
struct __packed hw_atl_txc_s {
u32 rsvd;
u32 len;
u32 ctl;
u32 len2;
};
/* Hardware rx descriptor */
struct __packed hw_atl_rxd_s {
u64 buf_addr;
u64 hdr_addr;
};
/* Hardware rx descriptor writeback */
struct __packed hw_atl_rxd_wb_s {
u32 type;
u32 rss_hash;
u16 status;
u16 pkt_len;
u16 next_desc_ptr;
u16 vlan;
};
struct __packed hw_atl_stats_s { struct __packed hw_atl_stats_s {
u32 uprc; u32 uprc;
u32 mprc; u32 mprc;
...@@ -126,26 +155,6 @@ struct __packed hw_aq_atl_utils_mbox { ...@@ -126,26 +155,6 @@ struct __packed hw_aq_atl_utils_mbox {
struct hw_atl_stats_s stats; struct hw_atl_stats_s stats;
}; };
struct __packed hw_atl_s {
struct aq_hw_s base;
struct hw_atl_stats_s last_stats;
struct aq_stats_s curr_stats;
u64 speed;
unsigned int chip_features;
u32 fw_ver_actual;
atomic_t dpc;
u32 mbox_addr;
u32 rpc_addr;
u32 rpc_tid;
struct hw_aq_atl_utils_fw_rpc rpc;
};
#define SELF ((struct hw_atl_s *)self)
#define PHAL_ATLANTIC ((struct hw_atl_s *)((void *)(self)))
#define PHAL_ATLANTIC_A0 ((struct hw_atl_s *)((void *)(self)))
#define PHAL_ATLANTIC_B0 ((struct hw_atl_s *)((void *)(self)))
#define HAL_ATLANTIC_UTILS_CHIP_MIPS 0x00000001U #define HAL_ATLANTIC_UTILS_CHIP_MIPS 0x00000001U
#define HAL_ATLANTIC_UTILS_CHIP_TPO2 0x00000002U #define HAL_ATLANTIC_UTILS_CHIP_TPO2 0x00000002U
#define HAL_ATLANTIC_UTILS_CHIP_RPF2 0x00000004U #define HAL_ATLANTIC_UTILS_CHIP_RPF2 0x00000004U
...@@ -154,7 +163,7 @@ struct __packed hw_atl_s { ...@@ -154,7 +163,7 @@ struct __packed hw_atl_s {
#define HAL_ATLANTIC_UTILS_CHIP_REVISION_B0 0x02000000U #define HAL_ATLANTIC_UTILS_CHIP_REVISION_B0 0x02000000U
#define IS_CHIP_FEATURE(_F_) (HAL_ATLANTIC_UTILS_CHIP_##_F_ & \ #define IS_CHIP_FEATURE(_F_) (HAL_ATLANTIC_UTILS_CHIP_##_F_ & \
PHAL_ATLANTIC->chip_features) self->chip_features)
enum hal_atl_utils_fw_state_e { enum hal_atl_utils_fw_state_e {
MPI_DEINIT = 0, MPI_DEINIT = 0,
...@@ -171,6 +180,10 @@ enum hal_atl_utils_fw_state_e { ...@@ -171,6 +180,10 @@ enum hal_atl_utils_fw_state_e {
#define HAL_ATLANTIC_RATE_100M BIT(5) #define HAL_ATLANTIC_RATE_100M BIT(5)
#define HAL_ATLANTIC_RATE_INVALID BIT(6) #define HAL_ATLANTIC_RATE_INVALID BIT(6)
struct aq_hw_s;
struct aq_hw_caps_s;
struct aq_hw_link_status_s;
void hw_atl_utils_hw_chip_features_init(struct aq_hw_s *self, u32 *p); void hw_atl_utils_hw_chip_features_init(struct aq_hw_s *self, u32 *p);
int hw_atl_utils_mpi_read_mbox(struct aq_hw_s *self, int hw_atl_utils_mpi_read_mbox(struct aq_hw_s *self,
...@@ -189,13 +202,12 @@ int hw_atl_utils_mpi_set_speed(struct aq_hw_s *self, u32 speed, ...@@ -189,13 +202,12 @@ int hw_atl_utils_mpi_set_speed(struct aq_hw_s *self, u32 speed,
int hw_atl_utils_mpi_get_link_status(struct aq_hw_s *self); int hw_atl_utils_mpi_get_link_status(struct aq_hw_s *self);
int hw_atl_utils_get_mac_permanent(struct aq_hw_s *self, int hw_atl_utils_get_mac_permanent(struct aq_hw_s *self,
struct aq_hw_caps_s *aq_hw_caps,
u8 *mac); u8 *mac);
unsigned int hw_atl_utils_mbps_2_speed_index(unsigned int mbps); unsigned int hw_atl_utils_mbps_2_speed_index(unsigned int mbps);
int hw_atl_utils_hw_get_regs(struct aq_hw_s *self, int hw_atl_utils_hw_get_regs(struct aq_hw_s *self,
struct aq_hw_caps_s *aq_hw_caps, const struct aq_hw_caps_s *aq_hw_caps,
u32 *regs_buff); u32 *regs_buff);
int hw_atl_utils_hw_set_power(struct aq_hw_s *self, int hw_atl_utils_hw_set_power(struct aq_hw_s *self,
......
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