Commit 111f2b87 authored by Krzysztof Adamski's avatar Krzysztof Adamski Committed by Linus Walleij

pinctrl: sunxi: H3 requires irq_read_needs_mux

It seems that on H3, just like on A10, when GPIOs are configured as
external interrupt data registers does not contain their value.  When
value is read, GPIO function must be temporary switched to input for
reads.
Signed-off-by: default avatarKrzysztof Adamski <k@japko.eu>
Acked-by: default avatarChen-Yu Tsai <wens@csie.org>
Acked-by: default avatarMaxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent eceb3e61
...@@ -492,6 +492,7 @@ static const struct sunxi_pinctrl_desc sun8i_h3_pinctrl_data = { ...@@ -492,6 +492,7 @@ static const struct sunxi_pinctrl_desc sun8i_h3_pinctrl_data = {
.pins = sun8i_h3_pins, .pins = sun8i_h3_pins,
.npins = ARRAY_SIZE(sun8i_h3_pins), .npins = ARRAY_SIZE(sun8i_h3_pins),
.irq_banks = 2, .irq_banks = 2,
.irq_read_needs_mux = true
}; };
static int sun8i_h3_pinctrl_probe(struct platform_device *pdev) static int sun8i_h3_pinctrl_probe(struct platform_device *pdev)
......
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