Commit 11826e5d authored by John Garry's avatar John Garry Committed by Martin K. Petersen

hisi_sas: add v2 hw support for >4 SATA phys

This patch adds support for directly attaching SATA disks to phy
4-8. The problem was that only registers concerned with phy 0-3 were
being considered in sata_int_v2_hw().  The issue was not detected
previously as the development board only exposed phy 0-3; the new board
provides access to 8 phys.
Signed-off-by: default avatarJohn Garry <john.garry@huawei.com>
Reviewed-by: default avatarZhangfei Gao <zhangfei.gao@linaro.org>
Signed-off-by: default avatarMartin K. Petersen <martin.petersen@oracle.com>
parent 3a429d5a
...@@ -1993,17 +1993,20 @@ static irqreturn_t sata_int_v2_hw(int irq_no, void *p) ...@@ -1993,17 +1993,20 @@ static irqreturn_t sata_int_v2_hw(int irq_no, void *p)
u32 ent_tmp, ent_msk, ent_int, port_id, link_rate, hard_phy_linkrate; u32 ent_tmp, ent_msk, ent_int, port_id, link_rate, hard_phy_linkrate;
irqreturn_t res = IRQ_HANDLED; irqreturn_t res = IRQ_HANDLED;
u8 attached_sas_addr[SAS_ADDR_SIZE] = {0}; u8 attached_sas_addr[SAS_ADDR_SIZE] = {0};
int phy_no; int phy_no, offset;
phy_no = sas_phy->id; phy_no = sas_phy->id;
initial_fis = &hisi_hba->initial_fis[phy_no]; initial_fis = &hisi_hba->initial_fis[phy_no];
fis = &initial_fis->fis; fis = &initial_fis->fis;
ent_msk = hisi_sas_read32(hisi_hba, ENT_INT_SRC_MSK1); offset = 4 * (phy_no / 4);
hisi_sas_write32(hisi_hba, ENT_INT_SRC_MSK1, ent_msk | 1 << phy_no); ent_msk = hisi_sas_read32(hisi_hba, ENT_INT_SRC_MSK1 + offset);
hisi_sas_write32(hisi_hba, ENT_INT_SRC_MSK1 + offset,
ent_msk | 1 << ((phy_no % 4) * 8));
ent_int = hisi_sas_read32(hisi_hba, ENT_INT_SRC1); ent_int = hisi_sas_read32(hisi_hba, ENT_INT_SRC1 + offset);
ent_tmp = ent_int & (1 << (ENT_INT_SRC1_D2H_FIS_CH1_OFF * phy_no)); ent_tmp = ent_int & (1 << (ENT_INT_SRC1_D2H_FIS_CH1_OFF *
(phy_no % 4)));
ent_int >>= ENT_INT_SRC1_D2H_FIS_CH1_OFF * (phy_no % 4); ent_int >>= ENT_INT_SRC1_D2H_FIS_CH1_OFF * (phy_no % 4);
if ((ent_int & ENT_INT_SRC1_D2H_FIS_CH0_MSK) == 0) { if ((ent_int & ENT_INT_SRC1_D2H_FIS_CH0_MSK) == 0) {
dev_warn(dev, "sata int: phy%d did not receive FIS\n", phy_no); dev_warn(dev, "sata int: phy%d did not receive FIS\n", phy_no);
...@@ -2054,8 +2057,8 @@ static irqreturn_t sata_int_v2_hw(int irq_no, void *p) ...@@ -2054,8 +2057,8 @@ static irqreturn_t sata_int_v2_hw(int irq_no, void *p)
queue_work(hisi_hba->wq, &phy->phyup_ws); queue_work(hisi_hba->wq, &phy->phyup_ws);
end: end:
hisi_sas_write32(hisi_hba, ENT_INT_SRC1, ent_tmp); hisi_sas_write32(hisi_hba, ENT_INT_SRC1 + offset, ent_tmp);
hisi_sas_write32(hisi_hba, ENT_INT_SRC_MSK1, ent_msk); hisi_sas_write32(hisi_hba, ENT_INT_SRC_MSK1 + offset, ent_msk);
return res; return res;
} }
......
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